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AD1816AJS Datasheet(PDF) 7 Page - Analog Devices |
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AD1816AJS Datasheet(HTML) 7 Page - Analog Devices |
7 / 52 page AD1816A –7– REV. A tDKHD tDKSU AEN IOR tDRHD tAEHD tAESU tSTW tRDDV tDHD1 DRQ (0, 1, 3) PC_D [7:0] DACK (0, 1, 3) Figure 3. DMA Read Cycle tDKHD tDKSU AEN IOW tDRHD tAEHD tAESU tSTW tDHD2 DRQ (0, 1, 3) DACK (0, 1, 3) PC_D [7:0] tWDSU Figure 4. DMA Write Cycle DATA [7:0] tBWDN BYTE N N + 1 N + 2 N + 3 IOR/IOW Figure 5. Codec Transfers SCLK tPD tFSW tS tH tDV SDFS SDI SDO BIT 15 BIT 14 BIT 0 BIT 15 BIT 14 BIT 0 Figure 6. DSP Port Timing BCLK SDATA LEFT-JUSTIFIED MODE SDATA RIGHT-JUSTIFIED MODE I 2S-JUSTIFIED MODE SDATA MSB LSB tDBH tDBP tDBL tDLS tDDS tDDH tDDS tDDH tDDS tDDH tDDS tDDH MSB L RCLK MSB MSB-1 Figure 7. I 2S Serial Port Timing RESET tRPWL Figure 8. Reset Pulse Width |
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