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AD14060BF-4 Datasheet(PDF) 23 Page - Analog Devices

Part No. AD14060BF-4
Description  Quad-SHARC DSP Multiprocessor Family
Download  44 Pages
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Maker  AD [Analog Devices]
Homepage  http://www.analog.com
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AD14060BF-4 Datasheet(HTML) 23 Page - Analog Devices

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AD14060/AD14060L
–23–
REV. A
5 V
3.3 V
Parameter
Min
Max
Min
Max
Units
Timing Requirements:
tHBGRCSV
HBG Low to RD/WR/CS Valid1
19.5 + 5DT/4
19.5 + 5DT/4
ns
tSHBRI
HBR Setup Before CLKIN2
20 + 3DT/4
20 + 3DT/4
ns
tHHBRI
HBR Hold Before CLKIN2
13.5 + 3DT/4
13.5 + 3DT/4
ns
tSHBGI
HBG Setup Before CLKIN
13 + DT/2
13 + DT/2
ns
tHHBGI
HBG Hold Before CLKIN High
5.5 + DT/2
5.5 + DT/2
ns
tSBRI
BRx, CPA Setup Before CLKIN3
13 + DT/2
13 + DT/2
ns
tHBRI
BRx, CPA Hold Before CLKIN High
5.5 + DT/2
5.5 + DT/2
ns
tSRPBAI
RPBA Setup Before CLKIN
20 + 3DT/4
20 + 3DT/4
ns
tHRPBAI
RPBA Hold Before CLKIN
11.5 + 3DT/4
11.5 + 3DT/4
ns
Switching Characteristics:
tDHBGO
HBG Delay After CLKIN
8 – DT/8
8 – DT/8
ns
tHHBGO
HBG Hold After CLKIN
–2 – DT/8
–2 – DT/8
ns
tDBRO
BRx Delay After CLKIN
8 – DT/8
8 – DT/8
ns
tHBRO
BRx Hold After CLKIN
–2 – DT/8
–2 – DT/8
ns
tDCPAO
CPA Low Delay After CLKIN
9 – DT/8
9 – DT/8
ns
tTRCPA
CPA Disable After CLKIN
–2 – DT/8
5.5 – DT/8
–2 – DT/8
5.5 – DT/8
ns
tDRDYCS
REDY (O/D) or (A/D) Low from
CS and HBR Low4
9.5
10.25
ns
tTRDYHG
REDY (O/D) Disable or REDY (A/D) High from
HBG4
44 + 27DT/16
44 + 27DT/16
ns
tARDYTR
REDY (A/D) Disable from
CS or HBR High4
11
11
ns
NOTES
1For first asynchronous access after
HBR and CS asserted, ADDR
31–0 must be a non-MMS value 1/2 tCK before RD or WR goes low or by tHBGRCSV after HBG goes
low. This is easily accomplished by driving an upper address signal high when
HBG is asserted.
2Only required for recognition in the current cycle.
3
CPA assertion must meet the setup to CLKIN; deassertion does not need to meet the setup to CLKIN.
4(O/D) = open drain, (A/D) = active drive.
Multiprocessor Bus Request and Host Bus Request
Use these specifications for passing of bus mastership between
multiprocessing ADSP-2106x’s (
BRx) or a host processor
(
HBR, HBG).


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