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RAA207704GBM Datasheet(PDF) 8 Page - Renesas Technology Corp |
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RAA207704GBM Datasheet(HTML) 8 Page - Renesas Technology Corp |
8 / 18 page RAA207703GBM/7704GBM/7705GBM Preliminary R07DS0892EJ0001 Rev.0.01 Page 8 of 17 Nov 29, 2012 Maximum Duty Cycle Operation Maximum duty cycle is restricted by following equation. Max. duty: 1 – (50 ns • Fsw) Here, Fsw is switching frequency. If FB voltage does not reach reference voltage after the High-side MOSFET turn on time is expired, Low-side MOSFET turns on 50 ns, and next switching cycle starts. Especially, this condition occurs when output load transient state. SW IL (inductor current) 50 ns Soft Start SS SGND Css Soft start ramp period is adjustable by external capacitor (Css) selection. When converter start operating, 2 A current from SS pin charges capacitor between SS and GND. Soft start period is determined by following equation. Soft Start period: Css • 0.8 V / 2.5 A [s] Here, 0.8 V is internal reference voltage Vref. IC operates diode emulation mode at Soft start period, so it can prevent from reverse current when pre-bias condition. Soft start restarts when Enable signal re-entered, and after OCP, OVP, TSD, UVL release condition. Power Good Indicator Power good indicator is useful for controlling multi-converter systems for sequential start up and shut down. FB voltage ismonitored continuously by power good comparator. The power good comparator compares FB pin and 90% internal referencevoltage (0.72 V). When FB reaches reference voltage, PGOOD pin becomes high impedance after internal delay (30% of soft start period). Under the fault condition (UVLO, OVP, OCP, TSD), PGOOD pin is pulled low. 0.72 V 0.80 V Soft start period Power Good delay (30% soft start period) SS FB Vout PGOOD |
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