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TPS84250 Datasheet(PDF) 22 Page - Texas Instruments

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Part # TPS84250
Description  7-V to 50-V Input, 2.5-A Step-Down, Integrated Power Solution
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TPS84250 Datasheet(HTML) 22 Page - Texas Instruments

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PGND
Plane
R
SET
VOUT sense
Via
LOAD
VOUT sense
Via
Thermal
Vias
AGND
VOUT
PGND
C
OUT1
VIN
PH
C
OUT2
C
IN1
AGND to PGND
Connection
TPS84250
SLVSAR6 – AUGUST 2012
www.ti.com
Thermal Shutdown
The internal thermal shutdown circuitry forces the device to stop switching if the junction temperature exceeds
180°C typically. The device reinitiates the power up sequence when the junction temperature drops below 165°C
typically.
Layout Considerations
To achieve optimal electrical and thermal performance, an optimized PCB layout is required. Figure 40 and
Figure 41 show two layers of a typical PCB layout. Some considerations for an optimized layout are:
Use large copper areas for power planes (VIN, VOUT, and PGND) to minimize conduction loss and thermal
stress.
Place ceramic input and output capacitors close to the module pins to minimize high frequency noise.
Locate additional output capacitors between the ceramic capacitor and the load.
Place a dedicated AGND copper area beneath the TPS84250.
Isolate the PH copper area from the VOUT copper area using the PGND copper area.
Connect the AGND and PGND copper area at one point; at pins 8 & 9.
Place RSET, RRT, and CSS as close as possible to their respective pins.
Use multiple vias to connect the power planes to internal layers.
Use a dedicated sense line to connect RSET to VOUT near the load for best regulation.
Figure 40. Typical Top-Layer Recommended
Figure 41. Typical PGND-Layer Recommended
Layout
Layout
22
Copyright © 2012, Texas Instruments Incorporated


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