© 2011 Fairchild Semiconductor Corporation

www.fairchildsemi.com

FSQ0370RNA / FSQ0370RLA • Rev. 1.0.2

3

Pin Assignments

Figure 3.

Pin Configuration (Top View)

Pin Definitions

Pin#

Name

Description

1

GND

SenseFET source terminal on the primary side and internal control ground.

2

Vcc

Positive supply voltage input. Although connected to an auxiliary transformer winding,

current is supplied from pin 5 (Vstr) via an internal switch during startup (see Figure 2).

opens and device power is supplied via the auxiliary transformer winding.

3

Vfb

The feedback voltage pin is the non-inverting input to the PWM comparator. It has a

0.9mA current source connected internally, while a capacitor and optocoupler are typically

connected externally. A feedback voltage of 6V triggers overload protection (OLP). There

current source. This delay prevents false triggering under transient conditions, but allows

the protection mechanism to operate in true overload conditions.

4

Ipk

This pin adjusts the peak current limit of the SenseFET. The 0.9mA feedback current

source is diverted to the parallel combination of an internal 2.8k

Ω resistor and any

external resistor to GND on this pin. This determines the peak current limit. If this pin is

tied to Vcc or left floating, the typical peak current limit is 1.1A.

5

Vstr

This pin is connected to the rectified AC line voltage source. At startup, the internal switch

supplies internal bias and charges an external storage capacitor placed between the Vcc

6, 7, 8

Drain

The drain pins are designed to connect directly to the primary lead of the transformer and

are capable of switching a maximum of 700V. Minimizing the length of the trace

connecting these pins to the transformer decreases leakage inductance.