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C3225X5R0J476M Datasheet(PDF) 10 Page - Richtek Technology Corporation

Part # C3225X5R0J476M
Description  3A, 23V, 340kHz Synchronous Step-Down Converter
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Manufacturer  RICHTEK [Richtek Technology Corporation]
Direct Link  http://www.richtek.com
Logo RICHTEK - Richtek Technology Corporation

C3225X5R0J476M Datasheet(HTML) 10 Page - Richtek Technology Corporation

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RT8290
10
DS8290-02
March 2011
www.richtek.com
Thermal Considerations
For continuous operation, do not exceed the maximum
operation junction temperature 125
°C. The maximum
power dissipation depends on the thermal resistance of
IC package, PCB layout, the rate of surroundings airflow
and temperature difference between junction to ambient.
The maximum power dissipation can be calculated by
following formula :
PD(MAX) = (TJ(MAX)
− TA) / θJA
where TJ(MAX) is the maximum operation junction
temperature, TA is the ambient temperature and the
θJAis
the junction to ambient thermal resistance.
For recommended operating conditions specification of
RT8290, the maximum junction temperature is 125
°C. The
junction to ambient thermal resistance
θJA is layout
dependent. For SOP-8 (Exposed Pad) package, the
thermal resistance
θJA is 75°C/W on the standard JEDEC
51-7 four-layers thermal test board. The maximum power
dissipation at TA = 25
°C can be calculated by following
formula :
PD(MAX) = (125
°C − 25°C) / (75°C/W) = 1.333W for
SOP-8 (Exposed Pad) package
The maximum power dissipation depends on operating
ambient temperature for fixed TJ(MAX) and thermal
resistance
θJA. For RT8290 package, the derating curve
in Figure 3 allows the designer to see the effect of rising
ambient temperature on the maximum power dissipation.
Layout Considerations
Follow the PCB layout guidelines for optimal performance
of the RT8290.
Keep the traces of the main current paths as short and
wide as possible.
Put the input capacitor as close as possible to the device
pins (VIN and GND).
SW node is with high frequency voltage swing and
should be kept in a small area. Keep sensitive
components away from the SW node to prevent stray
capacitive noise pick-up.
Place the feedback components as close to the FB pin
and COMP pin as possible.
The GND pin and Exposed Pad should be connected to
a strong ground plane for heat sinking and noise
protection.
Figure 3. Derating Curve for RT8290 Package
VIN
GND
CIN
2
3
4
5
8
7
6
GND
SS
BOOT
VIN
GND
SW
FB
EN
COMP
GND
CS
CP
CC
RC
SW
VOUT
COUT
L1
Input capacitor must be placed
as close to the IC as possible.
SW should be connected to inductor by
wide and short trace. Keep sensitive
components away from this trace.
The feedback
components must be
connected as close to
the device as possible.
R1
R2
VOUT
Figure 4. PCB Layout Guide
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
0
25
50
75
100
125
Ambient Temperature (°C)
Four-Layer PCB


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