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ISO1540_1210 Datasheet(PDF) 9 Page - Texas Instruments |
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ISO1540_1210 Datasheet(HTML) 9 Page - Texas Instruments |
9 / 21 page 0 300 0 50 100 150 200 Case Temperature ( C) o 200 350 100 250 150 50 VCC1 = = 3.6 V VCC2 VCC1 = = 5.5 V VCC2 ISO1540 ISO1541 www.ti.com SLLSEB6A – JULY 2012 – REVISED OCTOBER 2012 Table 4. IEC 60664-1 RATINGS TABLE PARAMETER TEST CONDITIONS SPECIFICATION Basic isolation group Material group II Rated mains voltage ≤ 150 VRMS I–IV Installation classification Rated mains voltage ≤ 300 VRMS I–III Rated mains voltage ≤ 400 VRMS I–II Table 5. REGULATORY INFORMATION VDE CSA UL Certified according to DIN EN 60747-5-2 Approved under CSA Component Acceptance Notice Recognized under UL 1577 (VDE 0884 Part 2) and EN 61010-1 5A, CSA/IEC 60950-1 and CSA/IEC 61010-1 Component Recognition Program Basic insulation per CSA 60950-1-07 and IEC 60950-1 (2nd Ed), 390 VRMS maximum working voltage Basic Insulation Basic insulation per CSA 61010-1-04 and IEC 61010-1 Maximum Transient Overvoltage, 4000 VPK Single Protection Isolation Voltage, (2nd Ed), 300 VRMS maximum working voltage Maximum Surge Voltage, 4000 VPK 2500 VRMS (1) Reinforced insulation per CSA 61010-1-04 and IEC Maximum Working Voltage, 566 VPK 61010-1 (2nd Ed), 150 VRMS maximum working voltage File number: 40016131 (pending) File number: 220991 File number: E181974 (1) Production tested ≥ 3000 VRMS for 1 second in accordance with UL 1577. IEC SAFETY LIMITING VALUES Safety limiting intends to prevent potential damage to the isolation barrier upon failure of input or output circuitry. A failure of the IO can allow low resistance to ground or the supply and, without current limiting, dissipate sufficient power to overheat the die and damage the isolation barrier potentially leading to secondary system failures. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT θJA = 114.6°C/W, VI = 5.5V, TJ = 150°C, TA = 25°C 198 Safety input, output, or supply IS D-8 mA current θJA = 114.6°C/W, VI = 3.6V, TJ = 150°C, TA = 25°C 303 TS Maximum case temperature 150 °C The safety-limiting constraint is the absolute maximum junction temperature specified in the absolute maximum ratings table. The power dissipation and junction-to-air thermal impedance of the device installed in the application hardware determines the junction temperature. The assumed junction-to-air thermal resistance in the Thermal Information table is that of a device installed on a High-K Test Board for Leaded Surface Mount Packages. The power is the recommended maximum input voltage times the current. The junction temperature is then the ambient temperature plus the power times the junction-to-air thermal resistance. ISO154x THERMAL DERATING Figure 5. Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: ISO1540 ISO1541 |
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