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ICX285AL Datasheet(PDF) 7 Page - Sony Corporation |
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ICX285AL Datasheet(HTML) 7 Page - Sony Corporation |
7 / 21 page – 7 – ICX285AL (3) Horizontal transfer clock waveform Cross-point voltage for the H φ1 rising side of the horizontal transfer clocks Hφ1 and Hφ2 waveforms is VCR. The overlap period for twh and twl of horizontal transfer clocks H φ1 and Hφ2 is two. (4) Reset gate clock waveform VRGLH is the maximum value and VRGLL is the minimum value of the coupling waveform during the period from Point A in the above diagram until the rising edge of RG. In addition, VRGL is the average value of VRGLH and VRGLL. VRGL = (VRGLH + VRGLL)/2 Assuming VRGH is the minimum value during the interval twh, then: V φRG = VRGH – VRGL Negative overshoot level during the falling edge of RG is VRGLm. (5) Substrate clock waveform VHL VCR twl two twh V φH V φH 2 tr H φ2 90% 10% H φ1 tf VRGLH VRGH VRGL VRGLL VRGLm tr twh RG waveform twl tf V φRG Point A VSUB 100% 90% 10% 0% tr tf twh φM 2 φM V φSUB (A bias generated within the CCD) |
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