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SPXS4040VVU264R Datasheet(PDF) 5 Page - Freescale Semiconductor, Inc

Part # SPXS4040VVU264R
Description  32-bit Power Architecture짰 Microcontrollers for Real-Time Applications
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

SPXS4040VVU264R Datasheet(HTML) 5 Page - Freescale Semiconductor, Inc

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Features
PXR40 Product Brief, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor
5
2.3
Critical performance parameters
The critical performance parameters of the PXR40 feature the following:
Maximum CPU frequency: 264 MHz
— Platform and peripheral modules typically run at half of the CPU frequency
— Some peripheral modules (including the eTPU modules) support a full frequency mode with a
maximum operating frequency of 200 MHz
Temperature range: –40
 to 105 C
Nominal power dissipation is less than 1.4 W, while enhancements to allow reduced power
operation using clock gating are included
Separate power supply available for stand-by operation of a portion of SRAM
2.3.1
Low-power modes
The PXR40 includes two special modes to allow reduction of application power consumption:
Slow mode: Allows the device to be run at very low speed (approximately 1 MHz), with modules
(including the PLL) selectively disabled by software.
Stop mode: System clock stopped to most modules including the CPU. Wake-up timer used to
restart the system clock after a predetermined time.
2.4
Package
The PXR40 is offered in a 416-ball PBGA, 1 mm ball pitch, 27 mm
 27 mm outline (no EBI) package
type.
2.5
Module features
The following sections provide more details of the modules implemented on the PXR40.
2.5.1
High-performance e200z7 core processor
The e200z7 core includes the following features:
Dual-issue, 32-bit Power Architecture® CPU
Supports the 32-bit Power Architecture Book E programmer’s model
64-bit general-purpose registers (GPRs) support vector instructions defined by the SPE2 APU
— All arithmetic instructions that execute in the core operate on data in the GPRs
Enhanced signal processing extension (SPE2) APU supports real-time fixed point and
single-precision embedded numerics operations using the GPRs
Variable length encoding (VLE) enhancements
— Allows optional encoding of mixed 16-bit and 32-bit instructions
— Results in smaller code size footprint


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