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PPXD2020VMG116R Datasheet(PDF) 19 Page - Freescale Semiconductor, Inc

Part No. PPXD2020VMG116R
Description  32-bit Power Architecture® Dual Core Microcontrollers for Industrial Networking
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

PPXD2020VMG116R Datasheet(HTML) 19 Page - Freescale Semiconductor, Inc

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Features
PXN20 Product Brief, Rev. 1
Freescale Semiconductor
19
— FlexRay Port A can be configured to be connected either to physical FlexRay channel A or
physical FlexRay channel B
FlexRay bus data rates of 10, 8, 5, and 2.5 Mbit/s supported
Up to 128 configurable message buffers with
— Individual frame ID filtering
— Individual channel ID filtering
— Individual cycle counter filtering
Message buffer header, status and payload data stored in dedicated FlexRay memory
— Allows for flexible and efficient message buffer implementation
— Consistent data access ensured by means of buffer locking scheme
— Application can lock multiple buffers at the same time
Message buffers can be configured as:
— Receive message buffer
— Single buffered transmit message buffer
— Double buffered transmit message buffer (combines two single buffered message buffers)
Individual message buffer reconfiguration supported
Two independent receive FIFOs
— One receive FIFO per channel
— Up to 255 entries for each FIFO
— Global frame ID filtering, based on both value/mask filters and range filters
— Global channel ID filtering
— Global message ID filtering for dynamic segment
Size of message buffer payload data configurable from 0 up to 254 bytes
Two independent message buffer segments with configurable size of payload data section
– Each segment can contain message buffers assigned to the static segment and message
buffers assigned to the dynamic segment at the same time
Support for independent internal clock source provided to module from a separate external 40 MHz
crystal
1 absolute timer
— 1 timer that can be configured to absolute or relative
2.6.25
Media Local Bus (MLB)
The following summarizes the MLB configuration:
Support of 16 logical channels running at a maximum speed of 1024 Fs
Transmission of commands and data and reception of receive status when functioning as the
transmitting device associated with a logical channel address
Reception of commands and data and transmission as receive status responses when functioning
as the receiving device associated with a logical channel address


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