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AD7988-1_1208 Datasheet(PDF) 20 Page - Analog Devices |
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AD7988-1_1208 Datasheet(HTML) 20 Page - Analog Devices |
20 / 24 page ![]() AD7988-1/AD7988-5 Data Sheet Rev. C | Page 20 of 24 CHAIN MODE This mode can be used to daisy-chain multiple AD7988-x devices on a 3-wire serial interface. This feature is useful for reducing component count and wiring connections, for example, in isolated multiconverter applications or for systems with a limited interfacing capacity. Data readback is analogous to clocking a shift register. A connection diagram example using two AD7988-x devices is shown in Figure 38, and the corresponding timing is given in Figure 39. When SDI and CNV are low, SDO is driven low. With SCK low, a rising edge on CNV initiates a conversion and selects the chain mode. In this mode, CNV is held high during the conversion phase and the subsequent data readback. When the conversion is complete, the MSB is output onto SDO and the AD7988-x enters the acquisition phase and powers down. The remaining data bits stored in the internal shift register are clocked by subsequent SCK falling edges. For each ADC, SDI feeds the input of the internal shift register and is clocked by the SCK falling edge. Each ADC in the chain outputs its data MSB first, and 16 × N clocks are required to read back the N ADCs. The data is valid on both SCK edges. Although the rising edge can be used to capture the data, a digital host using the SCK falling edge allows a faster reading rate and, consequently, more AD7988-x devices in the chain, provided that the digital host has an acceptable hold time. The maximum conversion rate may be reduced due to the total readback time. DIGITAL HOST CONVERT CLK DATA IN AD7988-1/ AD7988-5 SDO CNV A SCK AD7988-1/ AD7988-5 SDO CNV B SCK SDI SDI Figure 38. Chain Mode Connection Diagram tCONV tCYC tSSDISCK tSCKL tSCK tHSDISCK tACQ ACQUISITION tSSCKCNV ACQUISITION tSCKH CONVERSION tHSCKCNV SCK CNV SDOB tEN DA15 DA14 DA13 DB15 DB14 DB13 DB1 DB0 DA15 DA14 DA0 DA1 DA1 DA0 tHSDO 1 2 3 15 16 17 14 18 30 31 32 tDSDO SDIA = 0 SDOA = SDIB Figure 39. Chain Mode Serial Interface Timing |
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