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F28M35H20C1 Datasheet(PDF) 4 Page - Texas Instruments |
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F28M35H20C1 Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 192 page  F28M35H20B1, F28M35H20C1 F28M35H22B1, F28M35H22C1, F28M35H32B1, F28M35H32C1 F28M35H50B1, F28M35H50C1, F28M35H52B1, F28M35H52C1 SPRS742D – JUNE 2011 – REVISED AUGUST 2012 www.ti.com 1 F28M35x ( Concerto™) MCUs ........................ 1 3 Device Pins ............................................. 87 1.1 Features ............................................. 1 3.1 Pin Assignments .................................... 87 1.2 Description ........................................... 2 3.2 Terminal Functions ................................. 88 1.3 Functional Block Diagram ........................... 3 4 Device Operating Conditions ...................... 111 Revision History .............................................. 5 4.1 Absolute Maximum Ratings ....................... 111 2 Device Overview ....................................... 10 4.2 Recommended Operating Conditions ............. 111 2.1 Device Characteristics .............................. 11 4.3 Electrical Characteristics .......................... 112 2.2 Memory Maps ...................................... 13 5 Electrical Specifications ............................ 113 2.3 Master Subsystem .................................. 23 5.1 Current Consumption ............................. 113 2.4 Control Subsystem ................................. 29 5.2 Thermal Design Considerations .................. 114 2.5 Analog Subsystem .................................. 33 5.3 Timing Parameter Symbology ..................... 115 5.4 Clock Frequencies, Requirements, and 2.6 Master Subsystem NMIs ........................... 36 Characteristics .................................... 116 2.7 Control Subsystem NMIs ........................... 36 5.5 Power Sequencing ................................ 119 2.8 Resets .............................................. 38 6 Peripheral Information and Timings ............. 123 2.9 Internal Voltage Regulation and Monitoring ........ 43 6.1 Analog and Shared Peripherals ................... 123 2.10 Input Clocks and PLLs ............................. 47 6.2 Master Subsystem Peripherals .................... 151 2.11 Master Subsystem Clocking ........................ 57 6.3 Control Subsystem Peripherals ................... 166 2.12 Control Subsystem Clocking ....................... 60 7 Device and Documentation Support ............. 185 2.13 Analog Subsystem Clocking ....................... 63 7.1 Device Support .................................... 185 2.14 Shared Resources Clocking ........................ 63 7.2 Documentation Support ........................... 186 2.15 Loss of Input Clock (NMI Watchdog Function) ..... 63 7.3 Community Resources ............................ 186 2.16 GPIOs and Other Pins .............................. 65 8 Mechanical Packaging and Orderable 2.17 Emulation/JTAG .................................... 81 Information ............................................ 187 2.18 Code Security Module (CSM) ...................... 84 8.1 Thermal Data for Package ........................ 187 2.19 µCRC Module ...................................... 85 8.2 Packaging Information ............................ 187 4 Contents Copyright © 2011–2012, Texas Instruments Incorporated Submit Documentation Feedback |
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