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MK51DN512ZCYY10 Datasheet(PDF) 2 Page - Freescale Semiconductor, Inc |
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MK51DN512ZCYY10 Datasheet(HTML) 2 Page - Freescale Semiconductor, Inc |
2 / 2 page K50 Family Options Benefits Features • ExpressLogicThreadX • SEGGERembOS • FreeRTOS • GreenHillsµ-velOSity • Mocana(security) • FullARMecosystem • Reducescoreinterruption,increasing performance • Designflexibilityandsystemcostreduction • Increasessystemsafetybyrestricting access to key memory locations • Providesscalabilityneededforkeydigital power and motor control applications One-Stop Enablement Offering: MCU + IDE + RTOS Freescale Tower System hardware development environment: • TWR-K53N512-KIT($179) IncludesTWR-SER,TWR-ELEVand TWR-K53N512modules • TWR-K53N512($109) IncludesTWR-K53N512and TWRPI-SLCDdaughtercard • Integrateddevelopmentenvironments Eclipse-basedCodeWarriorIDE and Processor Expert IAREmbeddedWorkbench Keil MDK CodeSourcery Sourcery G++ (GNU) • Portablemedicalapplicationsdemo software: EKG, pulse oximeter, blood pressure monitor, spirometer • Math,DSPandencryptionlibraries • Motorcontrollibraries • Complimentarybootloaders(USB,Ethernet, RF, serial) • ComplimentaryFreescaleembeddedGUI • ComplimentaryFreescaleMQX™RTOS • Cost-effectiveNano™SSL/Nano™SSHfor FreescaleMQXRTOS • MicriumuC/OS-III Freescale, the Freescale logo, CodeWarrior and the Energy Efficient Solutions logo and Processor Expert are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. Xtrinsic is a trademark of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. ARM is the registered trademark of ARM Limited. ARM Cortex-M4 is the trademark of ARM Limited. © 2011, 2012 Freescale Semiconductor, Inc. KNTSK50FMLYFS REV 4 For current information about Kinetis products and documentation, please visit freescale.com/Kinetis yy = Package designator Part Number Memory Feature Options Packages MK50DX128Cyy7 72 128 32 32 2 √ √ √ √ √ √ √ MK51DX128Cyy7 72 128 32 32 2 √ √ √ √ √ √ √ √ MK50DX256Cyy7 72 256 32 64 2 √ √ √ √ √ √ √ MK51DX256Cyy7 72 256 32 64 2 √ √ √ √ √ √ √ √ MK51DN256ZCyy10 100 256 - 64 √ √ √ √ √ √ √ MK50DX256ZCyy10 100 256 256 64 4 √ √ √ √ √ √ √ MK51DX256ZCyy10 100 256 256 64 4 √ √ √ √ √ √ √ √ MK53DX256ZCyy10 100 256 256 128 4 √ √ √ √ √ √ √ √ MK50DN512ZCyy10 100 512 - 128 √ √ √ √ √ √ √ √ MK51DN512ZCyy10 100 512 - 128 √ √ √ √ √ √ √ √ √ MK52DN512ZCyy10 100 512 - 128 √ √ √ √ √ √ √ MK53DN512ZCyy10 100 512 - 128 √ √ √ √ √ √ √ √ • ARM® Cortex™-M4 core with DSP instruction support • Upto16-channelDMAand crossbar switch • Upto100MHzcoresupportingabroadrangeofprocessingbandwidthneeds • PeripheralandmemoryservicingwithreducedCPUloading.Concurrentmulti-master bus accesses for increased bus bandwidth • Upto2x16-bitADCwithPGA • Upto2x12-bitDAC • Programmabledelayblock • Operationaland transimpedance amplifiers • Voltagereference(VREF) • High-resolutionandhigh-accuracyADCprovidesaccuratesignalacquisition • Digital-to-analogconverterwithclockgatingoptimizedforlow-powerusage • PDBpreciselytriggersADCandDACblockstocompletesensorbiasingand measurement (i.e. glucometry strips) • OPAMPSallowsignalfilteringandamplification,TRIAMPSareoptimizedfor converting current inputs into voltages that can be read by the ADC • VREFallowsenhancedaccuracybysupplyinganalogperipheralswithfixedreference • IEEE® 1588 Ethernet MAC with hardware time stamping • Hardwareencryptioncoprocessor • Precisionclocksynchronizationforreal-timenetworkedindustrialautomation and control • Securedatatransferandstorage.Fasterthansoftwareimplementationsandwith minimal CPU loading. Supports a wide variety of algorithms • USBOn-The-Go(Full-Speed)with device charger detect • Optimizedchargingcurrent/timeforportableUSBdevicesenablinglongerbatterylife USBlow-voltageregulatorsuppliesupto120mAoffchipat3.3Vtopowerexternal componentsfrom5Vinput • Flexible,low-powerLCDcontroller with support for up to 320 segments (40 x 8 or 44 x 4) • LCDblinkmodeenableslowaveragepowerwhileremaininginlow-powermode • SegmentfaildetectguardsagainsterroneousreadoutsandreducesLCDtestcosts • Frontplane/backplanereassignmentprovidespin-outflexibilityeasingPCBdesign and allows LCD configuration changes via firmware with no hardware re-work • Supportsmultiple3Vand5VLCDpanelsizeswithfewersegments(pins)than competitive controllers and no external components • UnusedLCDpinscanbeconfiguredasotherGPIOfunctions • FlexBusexternalbusinterfaceand secure digital host controller • Enablestheconnectionofexternalmemoriesandperipherals(e.g.,graphicsdisplays) • ConnectiontoSD,SDIO,MMCorCE-ATAcardsforin-applicationsoftware upgrades,filesystemsoraddingWi-Fi® or Bluetooth® support • 128–512KBflash. Up to 128 KB of SRAM • 32–256KBFlexMemory • Highreliability,fastaccessprogrammemorywith4-levelsecurityprotection • Independentflashbanksallowconcurrentcodeexecutionandfirmwareupdating • FlexMemoryprovides2–4KBofuser-segmentablebytewrite/eraseEEPROM Inaddition,FlexNVMfrom32–256KBforextraprogramcode,dataor EEPROM backup |
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