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IS46R16160D-6BLA2 Datasheet(PDF) 9 Page - Integrated Silicon Solution, Inc

Part # IS46R16160D-6BLA2
Description  8Mx32, 16Mx16, 32Mx8 256Mb DDR SDRAM
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Manufacturer  ISSI [Integrated Silicon Solution, Inc]
Direct Link  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS46R16160D-6BLA2 Datasheet(HTML) 9 Page - Integrated Silicon Solution, Inc

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Integrated Silicon Solution, Inc.
9
Rev.  B
06/19/2012
IS43R83200D
IS43/46R16160D, IS43/46R32800D
PIN FUNCTIONAL DESCRIPTIONS
Symbol
Type
Description
CK,CK
Input
Clock:CKandCKaredifferentialclockinputs.Alladdressandcontrolinputsignalsaresampled
onthecrossingofthepositiveedgeofCKandnegativeedgeofCK.Inputandoutputdatais
referencedtothecrossingofCKandCK(bothdirectionsofcrossing).Internalclocksignalsare
derivedfromCK/CK.
CKE
Input
ClockEnable:CKEHIGHactivates,andCKELOWdeactivatesinternalclocksignals,anddevice
inputbuffersandoutputdrivers.TakingCKELOWprovidesPRECHARGEPOWER-DOWNand
SELFREFRESHoperation(allbanksidle),orACTIVEPOWERDOWN(rowACTIVEinany
bank).CKEissynchronousforallfunctionsexceptforSELFREFRESHEXIT,whichisachieved
asynchronously.Inputbuffers,excludingCK,CKandCKE,aredisabledduringpower-downand
selfrefreshmodewhicharecontrivedforlowstandbypowerconsumption.
CS
Input
ChipSelect:CSenables(registeredLOW)anddisables(registeredHIGH)thecommand
decoder.AllcommandsaremaskedwhenCSisregisteredHIGH.CSprovidesforexternalbank
selectiononsystemswithmultiplebanks.CSisconsideredpartofthecommandcode.
RAS
,CAS,
WE
Input
CommandInputs:RAS,CASandWE(alongwithCS)definethecommandbeingentered.
DM:x8;
LDM,UDM:
x16;
DM0-DM3:
x32
Input
InputDataMask:DMisaninputmasksignalforwritedata.InputdataismaskedwhenDMis
sampledHIGHalongwiththatinputdataduringaWRITEaccess.DMissampledonbothedges
ofDQS.AlthoughDMpinsareinput-only,theDMloadingmatchestheDQandDQSloading.
Forx16devices,LDMcorrespondstothedataonDQ0-DQ7,UDMcorrespondstothedataon
DQ8-DQ15.
Forx32devices,DM0correspondstothedataonDQ0-DQ7,DM1correspondstothedataon
DQ8-DQ15,DM2correspondstothedataonDQ16-DQ23,andDM3correspondstothedataon
DQ24-DQ31.
BA0,BA1
Input
InputBankAddressInputs:BA0andBA1definetowhichbankanACTIVE,READ,WRITEor
PRECHARGEcommandisbeingapplied.
A[12:0]
Input
AddressInputs:providetherowaddressforACTIVEcommands,andthecolumnaddressand
AUTOPRECHARGEbitforREAD/WRITEcommands,toselectonelocationoutofthememory
arrayintherespectivebank.TheaddressinputsalsoprovidetheopcodeduringaMODE
REGISTERSETcommand.A12isnotusedforx32.
DQ:
DQ0-DQ7:x8;
DQ0-DQ15:
x16
DQ0-DQ31:
x32
I/O
DataBus:Input/Output
DQS:x8:
LDQS,UDQS
x16:
DQS0-DQS3:
x32
I/O
DataStrobe:Outputwithreaddata,inputwithwritedata.Edge-alignedwithreaddata,centered
withwritedata.Usedtocapturewritedata.
Forx16device,LDQScorrespondstothedataonDQ0-DQ7,UDQScorrespondstothedataon
DQ8-DQ15.
Forx32device,DQS0correspondstothedataonDQ0-DQ7,DQS1correspondstothedataon
DQ8-DQ15,DQS2correspondstothedataonDQ16-DQ23,andDQS3correspondstothedata
onDQ24-DQ31.
NC
--
NoConnect:Shouldbeleftunconnected.
VREF
Supply SSTL_2referencevoltage.
VDDQ
Supply I/OPowerSupply.
VSSQ
Supply I/OGround.
VDD
Supply PowerSupply.
VSS
Supply Ground.


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