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SSW-110-22-F-D-VS-K Datasheet(PDF) 3 Page - Texas Instruments

Part No. SSW-110-22-F-D-VS-K
Description  EEG Front-End Performance Demonstration Kit
Download  68 Pages
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Maker  TI1 [Texas Instruments]
Homepage  http://www.ti.com
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SSW-110-22-F-D-VS-K Datasheet(HTML) 3 Page - Texas Instruments

 
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36
Dedicated Reference and Bias Electrode
.............................................................................. 33
37
Programmable reference and bias electrode
.......................................................................... 34
38
Settings for Normal Electrode
............................................................................................ 35
39
Configuring BIASREF and Bias Drive Buffer
.......................................................................... 35
40
Setting up the Bias Drive Loop
.......................................................................................... 36
41
Setting the LOFF Register Bits
.......................................................................................... 37
42
Configuring the Lead Off Comparator
.................................................................................. 37
43
Lead off Status Registers
................................................................................................ 37
44
Scope tab for Impedance Measurement at 31.25Hz
................................................................. 38
45
FFT Analysis for Impedance Measurement at 31.25Hz
.............................................................. 39
46
Scope Tab for Impedance Measurement at fDR/4 (DR = 4ksps)
................................................... 40
47
Multiplexer Setting for Calibration with Electrode Disconnected
.................................................... 41
48
Multiplexer Setting with Positive Electrode Connected to Test Signal
............................................. 42
49
Multiplexer Setting with Both Electrodes Connected to Test Signal
................................................ 42
50
Channel Setting for Input Short Test
.................................................................................... 43
51
Global Register Settings for Input Short Test
.......................................................................... 43
52
Scope Tab for Input Short Test
.......................................................................................... 44
53
Global Register Settings for External Input Short Test
............................................................... 45
54
Scope Showing Noise for Input Short with 5k Resistors
............................................................. 45
55
MISC1 Register Setting for SRB1
....................................................................................... 46
56
Noise with Negative Input Connected to SRB1 Pin
................................................................... 47
57
Noise with OPA376 in SRB1 Path
...................................................................................... 48
58
Scope Tab with Sinusoidal Inputs on AIN1
............................................................................ 49
59
ADS1299EEG-FC Schematic
........................................................................................... 50
60
ADS1299EEG-FC Jumper Schematic
................................................................................. 51
61
ECG Power Supplies
..................................................................................................... 52
62
External Reference Drivers (Not Installed)
............................................................................ 53
63
ECG MDK Board Interface Adapter
..................................................................................... 53
64
ADS1299EEG-FE Top Assembly
....................................................................................... 54
65
ADS1299EEG-FE Top Layer
............................................................................................ 54
66
ADS1299EEG-FE Internal Layer (1)
.................................................................................... 55
67
ADS1299EEG-FE Internal Layer (2)
.................................................................................... 55
68
ADS1299EEG-FE Bottom Layer
........................................................................................ 56
69
ADS1299EEG-FE Bottom Assembly
.................................................................................... 56
70
Recommended Power Supply for ADS1299EEG-FE
................................................................. 59
List of Tables
1
Factory Default Jumper Settings
.......................................................................................... 6
2
Power Supply Test Points
................................................................................................ 15
3
Analog Supply Configurations
........................................................................................... 15
4
Digital Supply Configurations
............................................................................................ 15
5
Clock Jumper Options
.................................................................................................... 15
6
External Reference Jumper Options
.................................................................................... 16
7
Test Signals
................................................................................................................ 16
8
Serial Interface Pin Out
................................................................................................... 16
9
Dedicated Reference Drive Options through REF_ELEC
............................................................ 33
10
Bill of Materials
............................................................................................................. 57
3
SLAU443 – May 2012
EEG Front-End Performance Demonstration Kit
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Copyright © 2012, Texas Instruments Incorporated


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