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THC63LVDM87 Datasheet(PDF) 7 Page - THine Electronics, Inc.

Part No. THC63LVDM87
Description  LOW POWER / SMALL PACKAGE / 24Bit COLOR LVDS TRANSMITTER
Download  12 Pages
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Maker  THINE [THine Electronics, Inc.]
Homepage  http://www.thine.co.jp/index_e.html
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THC63LVDM87 Datasheet(HTML) 7 Page - THine Electronics, Inc.

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Copyright©2012 THine Electronics, Inc.
7/12
THine Electronics, Inc.
THC63LVDM87_Rev.1.00_E
Switching Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Min.
Typ.
Max.
Units
tTCP
CLK IN Period
6.25
T
125
ns
tTCH
CLK IN High Time
0.35T
0.5T
0.65T
ns
tTCL
CLK IN Low Time
0.35T
0.5T
0.65T
ns
tTCD
CLK IN to TCLK+/- Delay (Fig4)
5T+3.1
5T+8
ns
tTS
TTL Data Setup to CLK IN
0.8
ns
tTH
TTL Data Hold from CLK IN
0.8
ns
tLVT
LVDS Transition Time
0.6
1.5
ns
tTOP1
Output Data Position0 (T=6.25ns~15ns)
-0.15
0.0
+0.15
ns
tTOP0
Output Data Position1 (T=6.25ns~15ns)
ns
tTOP6
Output Data Position2 (T=6.25ns~15ns)
ns
tTOP5
Output Data Position3 (T=6.25ns~15ns)
ns
tTOP4
Output Data Position4 (T=6.25ns~15ns)
ns
tTOP3
Output Data Position5 (T=6.25ns~15ns)
ns
tTOP2
Output Data Position6 (T=6.25ns~15ns)
ns
tTPLL
Phase Lock Loop Set
10.0
ms
T
7
---
0.15
T
7
---
T
7
---
0.15
+
2
T
7
---
0.15
2
T
7
---
2
T
7
---
0.15
+
3
T
7
---
0.15
3
T
7
---
3
T
7
---
0.15
+
4
T
7
---
0.15
4
T
7
---
4
T
7
---
0.15
+
5
T
7
---
0.15
5
T
7
---
5
T
7
---
0.15
+
6
T
7
---
0.15
6
T
7
---
6
T
7
---
0.15
+
AC Timing Diagrams
5pF
20%
80%
20%
80%
tLVT
tLVT
LVDS Output
Vdiff
100
Ω
Vdiff=(TA+)-(TA-)
TA+
TA-
LVDS Output Load
Fig3. LVDS Output Load and Transition Time


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