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NCP1253BSN65T1G Datasheet(PDF) 4 Page - ON Semiconductor |
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NCP1253BSN65T1G Datasheet(HTML) 4 Page - ON Semiconductor |
4 / 15 page NCP1253 http://onsemi.com 4 MAXIMUM RATINGS TABLE Symbol Rating Value Unit VCC Power Supply voltage, Vcc pin, continuous voltage 28 V Maximum voltage on low power pins CS, and FB −0.3 to 10 V RqJ−A Thermal Resistance Junction−to−Air 360 °C/W TJ,max Maximum Junction Temperature 150 °C Storage Temperature Range −60 to +150 °C ESD Capability, Human Body Model, all pins 2 kV ESD Capability, Machine Model 200 V Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. This device series contains ESD protection and exceeds the following tests: Human Body Model 2000 V per Mil−Std−883, Method 3015. Machine Model Method 200 V. 2. This device contains latch−up protection and exceeds 100 mA per JEDEC Standard JESD78. ELECTRICAL CHARACTERISTICS (For typical values TJ = 25°C, for min/max values TJ = −40°C to +125°C, Max TJ = 150°C, VCC = 12 V unless otherwise noted) Symbol Rating Pin Min Typ Max Unit VCCON VCC increasing level at which driving pulses are authorized 5 16 18 20 V VCC(min) VCC decreasing level at which driving pulses are stopped 5 8.2 8.8 9.4 V VCCHYST Hysteresis VCCON−VCC(min) 5 6 − − V VZENER Clamped VCC when latched off @ ICC = 500 mA 5 − 7 − V ICC1 Start−up current 5 − − 15 mA ICC2 Internal IC consumption with IFB = 50 mA, FSW = 65 kHz and CL = 0 5 − 1.4 2.2 mA ICC3 Internal IC consumption with IFB = 50 mA, FSW = 65 kHz and CL = 1 nF 5 − 2.1 3.0 mA ICC2 Internal IC consumption with IFB = 50 mA, FSW = 100 kHz and CL = 0 5 − 1.7 2.5 mA ICC3 Internal IC consumption with IFB = 50 mA, FSW = 100 kHz and CL = 1 nF 5 − 3.1 4.0 mA ICCstby Internal IC consumption while in skip mode (VCC = 12 V, driving a typical 6 A/600 V MOSFET) 5 550 mA ICCLATCH Current flowing into VCC pin that keeps the controller latched – TJ = 0 to 125°C 5 32 mA ICCLATCH Current flowing into VCC pin that keeps the controller latched – TJ = −40°C to 125°C 5 40 mA DRIVE OUTPUT Tr Output voltage rise−time @ CL = 1 nF, 10−90% of output signal 6 − 40 − ns Tf Output voltage fall−time @ CL = 1 nF, 10−90% of output signal 6 − 30 − ns ROH Source resistance 6 − 13 − W ROL Sink resistance 6 − 6 − W Isource Peak source current, VGS = 0 V (Note 3) 6 300 mA Isink Peak sink current, VGS = 12 V (Note 3) 6 500 mA VDRVlow DRV pin level at VCC close to VCC(min) with a 33 kW resistor to GND 6 8 − − V VDRVhigh DRV pin level at VCC= 28 V – DRV unloaded 6 10 12 14 V 3. Guaranteed by design CURRENT COMPARATOR IIB Input Bias Current @ 0.8 V input level on pin 4 4 0.02 mA VLimit1 Maximum internal current setpoint – TJ = 25 °C 4 0.744 0.8 0.856 V VLimit2 Maximum internal current setpoint – TJ = −40° to 125 °C 4 0.72 0.8 0.88 V |
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