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CXP972032 Datasheet(PDF) 5 Page - Sony Corporation |
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CXP972032 Datasheet(HTML) 5 Page - Sony Corporation |
5 / 44 page – 5 – CXP972032/973032/973064 Pin Assignment 3 (Top View) 104-pin LFLGA package 3 100 2 1 5 4 6 7 8 9 10 13 12 11 15 16 14 17 18 19 20 21 22 24 23 28 25 27 26 29 30 32 31 33 35 34 38 37 36 39 40 41 42 43 46 44 45 47 49 48 53 50 52 51 55 54 56 57 58 60 59 61 62 63 64 65 66 67 68 71 69 70 72 74 73 78 75 77 76 80 79 81 82 83 85 84 88 87 86 90 91 89 92 93 94 95 96 97 99 98 12 3 4 5 6 7 8 9 10 11 12 13 PB0 PA6 PA3 PA1 VDD PH6 PH4 PH2 PK6 A PB2 PA7 PA4 PA2 VSS PH7 PH3 PK5 PK4 B PB5 PB3 PB1 PA5 PA0 NC PH5 PH1 PH0 PK3 PK1 C PC0 PB4 PB6 PK2 AVDD AVREF D PC2 PC1 PB7 PK0 AVSS PJ7 E PC5 PC4 PC3 PJ6 PJ5 PJ4 F PC7 VSS PC6 PJ3 PJ1 PJ2 G PD1 PD2 PD0 PI6 PJ0 PI7 H PD3 PD4 PD5 PI3 PI4 PI5 J PD6 PD7 PE1 PI2 PI0 VSS K PE0 PE2 PE6 PF0 PF3 PF6 EXTAL PG3 PG5 PG7 PI1 L PE3 PE4 PF2 PF5 RST XTAL PG0 PG2 PG6 M PE5 PE7 PF1 PF4 PF7 VSS VDD PG1 PG4 N Note) 1. NC (Pin C7) must be left open. However, use this pin for FLASH EEPROM incorporated version. 2. Vss and AVss (Pins B7, E12, G2, K13 and N8) must be connected to GND. 3. VDD and AVDD (Pins A7, D12 and N9) must be connected to VDD. |
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