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CXP922P032 Datasheet(PDF) 8 Page - Sony Corporation |
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CXP922P032 Datasheet(HTML) 8 Page - Sony Corporation |
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8 / 28 page  – 8 – CXP922P032 Pin Circuit format After a reset PF6/TO0 "H" level PF7/TO1/ PWM "H" level ("H" level at ON resistance of pull-up transistor during a reset.) TO0 RD Internal data bus PFSL register "0" after a reset PF register "1" after a reset PFSL register (Bit 7) PFSL register (Bit 6) TO1 output enable TO1 PWM ∗ Pull-up transistor approximately 150k Ω (VDD = 4.5 to 5.5V) approximately 200k Ω (VDD = 3.0 to 3.6V) RD Internal data bus Internal reset signal ∗ 01 MPX 1x 00 PF register "1" after a reset "00" after a reset Hi-Z AN0 to AN3 IP A/D converter Input multiplexer |
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Similar Description - CXP922P032 |
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