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HT56R64 Datasheet(PDF) 12 Page - Holtek Semiconductor Inc |
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HT56R64 Datasheet(HTML) 12 Page - Holtek Semiconductor Inc |
12 / 90 page HT56R64 Rev. 1.60 12 May 21, 2012 · Location 010H This internal vector is used by the Timer/Event Coun- ter 1. If a Timer/Event Counter 1 overflow occurs, the program will jump to this location and begin execution if the timer/event counter interrupt is enabled and the stack is not full. · Location 014H This internal vector is used by the SPI/I 2C interrupt. When either an SPI or I 2C bus, dependent upon which one is selected, requires data transfer, the program will jump to this location and begin execution if the SPI/I 2C interrupt is enabled and the stack is not full. · Location 018H This internal vector is used by the Multi-function Inter- rupt. When the Time Base overflows, the Real Time Clock overflows, the A/D converter completes its con- version process, or an active edge appears on the Ex- ternal Peripheral interrupt pin, the program will jump to this location and begin execution if the relevant inter- rupt is enabled and the stack is not full. Look-up Table Any location within the Program Memory can be defined as a look-up table where programmers can store fixed data. To use the look-up table, the table pointer must first be setup by placing the lower order address of the look up data to be retrieved in the table pointer register, TBLP. This register defines the lower 8-bit address of the look-up table. After setting up the table pointer, the table data can be retrieved from the current Program Memory page or last Program Memory page using the ²TABRDC[m]² or ²TABRDL [m]² instructions, respectively. When these in- structions are executed, the lower order table byte from the Program Memory will be transferred to the user de- fined Data Memory register [m] as specified in the in- struction. The higher order table data byte from the Program Memory will be transferred to the TBLH special register. Any unused bits in this transferred higher order byte will be read as ²0². The following diagram illustrates the addressing/data flow of the look-up table: N o t I m p l e m e n t e d 1 5 b i t s 0 1 4 H I n i t i a l i s a t i o n V e c t o r E x t e r n a l I N T 0 I n t e r r u p t V e c t o r T i m e r C o u n t e r 0 I n t e r r u p t V e c t o r S P I / I 2 C I n t e r r u p t V e c t o r 0 0 0 H 0 0 4 H 0 0 8 H 0 0 C H 0 1 0 H 0 1 8 H F F F H E x t e r n a l I N T 1 I n t e r r u p t V e c t o r T i m e r C o u n t e r 1 I n t e r r u p t V e c t o r M u l t i _ F u n c t i o n I n t e r r u p t V e c t o r Program Memory Structure Instruction Table Location Bits b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 TABRDC [m] PC11 PC10 PC9 PC8 @7 @6 @5 @4 @3 @2 @1 @0 TABRDL [m] 1111 @7 @6 @5 @4 @3 @2 @1 @0 Table Location Note: PC11~PC8: Current program counter bits @7~@0: Table Pointer TBLP bits P r o g r a m M e m o r y P r o g r a m C o u n t e r H i g h B y t e T B L P T B L H S p e c i f i e d b y [ m ] T a b l e C o n t e n t s H i g h B y t e T a b l e C o n t e n t s L o w B y t e |
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