– 4 –

CXK5B81020J/TM

• Read cycle

∗ Transition is measured ±200mV from steady voltage with specified loading in Fig. 1 1-(2).

This parameter is sampled and is not 100% tested.

• Write cycle

∗ Transition is measured ±200mV from steady voltage with specified loading in Fig. 1 1-(2).

This parameter is sampled and is not 100% tested.

12

—

—

—

3

3

0

0

0

—

12

12

6

—

—

—

6

6

ns

ns

ns

ns

ns

ns

ns

ns

ns

Read cycle time

Address access time

Chip enable access time

Output enable to output valid

Output data hold time

Chip enable to output in low Z (CE)

Output enable to output in low Z (OE)

Chip disable to output in high Z (CE)

Output disable to output in high Z (OE)

Item

Symbol

Unit

-12

Min.

Max.

12

10

10

8

0

10

0

0

4

0

—

—

—

—

—

—

—

—

—

6

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

Write cycle time

Address valid to end of write

Chip enable to end of write

Data valid to end of write

Data hold from end of write

Write pulse width

Address set up time

Write recovery time

Output active from lend of write

Write to output in high Z

Item

Symbol

Unit

-12

Min.

Max.