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CXK591000YM Datasheet(PDF) 1 Page - Sony Corporation |
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CXK591000YM Datasheet(HTML) 1 Page - Sony Corporation |
1 / 13 page Description The CXK591000TM/YM/M is a high speed CMOS static RAM organized as 131,072-words by 9 bits. A polysilicon TFT cell technology realized extremely low stand-by current and higher data retention stability. Special feature are low power consumption and high speed. The CXK591000TM/YM/M is a suitable RAM for portable equipment with battery back up and parity bit. Features • Fast access time CXK591000TM/YM/M (Access time) -55LL 55ns (Max.) -70LL 70ns (Max.) -10LL 100ns (Max.) • Low standby current CXK591000TM/YM/M -55LL/70LL/10LL 24µA (Max.) • Low data retention current CXK591000TM/YM/M -55LL/70LL/10LL 14µA (Max.) • Single +5V supply: 5V ± 10%. • Low voltage date retention: 2.0V (Min.) • Broad package line-up CXK591000TM/YM 8mm × 20mm 32 pin TSOP Package CXK591000M 525mil 32 pin SOP Package Function 131072 word × 9 bit static RAM Structure Silicon gate CMOS IC – 1 – CXK591000TM/YM/M -55LL/70LL/10LL E93X06-PS 131,072-word × 9-bit High Speed CMOS Static RAM Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. CXK591000TM 32 pin TSOP (PIastic) CXK591000YM 32 pin TSOP (PIastic) CXK591000M 32 pin SOP (PIastic) Block Diagram I /O Gate Column Decoder Row Decoder Buffer Buffer Buffer VCC GND I/O1 I/O9 OE WE CE1 A10 A11 A9 A8 A15 A16 A14 A12 A7 A5 A6 A4 A3 A1 A0 A13 A2 CE2 I /O Buffer Memory Matrix 1024 × 1152 For the availability of this product, please contact the sales office. |
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