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CXD3027R Datasheet(PDF) 73 Page - Sony Corporation |
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CXD3027R Datasheet(HTML) 73 Page - Sony Corporation |
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73 / 191 page  – 73 – CXD3027R Command bit Processing VPCTL1 to VPCTL0, VP7 to VP0 Sets the pitch for variable pitch mode. The settings in variable pitch mode are as follows. The pitch setting can be expressed with the following equation. P = [%] –n 10 P: Pitch setting value n: VPCTL1 and VPCTL0, VP7 to VP0 setting value (two's complement, VPCTL1 = sign bit) The pitch setting range is from –48.7 to +51.2%. The plus pitch setting should not exceed the playback speed given in the Recommended Operating Conditions. An example of variable pitch mode commands is shown below. $EX001 (Sets INV VPCO = 1.) $AE4 (Setting to enable variable pitch mode.) $AEC (Turns on variable pitch mode. The internal clock uses the VCO2 reference.) $D60A00 (Sets the pitch to –1.0%.) $D60000 (Sets the pitch to 0.0%.) $AE4 (Turns off variable pitch mode. The internal clock uses the crystal reference.) VPCTL1 1 1 0 0 VPCTL0 0 1 0 1 VP7 to 0 00 (H) : FF (H) 00 (H) : FF (H) 00 (H) : FF (H) 00 (H) : E7 (H) Pitch setting value [%] +51.2 to +25.7 +25.6 to +0.1 0.0 to –25.5 –25.6 to –48.7 Command setting example $D60080 : $D6FF80 $D600C0 : $D6FFC0 $D60000 : $D6FF00 $D60040 : $D6E740 Command bit |
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