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CXD3027R Datasheet(PDF) 53 Page - Sony Corporation |
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CXD3027R Datasheet(HTML) 53 Page - Sony Corporation |
53 / 191 page – 53 – CXD3027R DTSL1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 ∗1 0 ∗1 0 ∗1 0 ∗1 0 ∗1 0 ∗1 0 ∗1 0 ∗1 External mode External & DAC mode DSP mode Shock-proof memory controller mode DSP mode External mode DSP mode External & DAC mode Shock-proof memory controller mode External & DAC mode DSP mode External & DAC mode Shock-proof memory controller mode External & DAC mode DSP mode External & DAC mode Shock-proof memory controller mode External & DAC mode DSP mode External & DAC mode Shock-proof memory controller mode External & DAC mode DTSL0 SDSL2 SDSL1 SDSL0 Input to DAC block DOUT output PCMD output When SLDBBIN = 1, the data input from the LRCKI, BCKI and PCMDI pins is selected. ∗1: The relationship between LRCK, BCK and PCMD changes according to the setting value. When SDSL0 = 0, the LRCK, BCK and PCMD phase difference is constant but the LRCK frequency changes when SDSL0 is switched. When SDSL0 = 1, the LRCK frequency is constant but the phase difference between LRCK, BCK and PCMD changes before and after SDSL1 is switched. When not switching the output data selection, set SDSL1 and SDSL0 to the same value. |
Similar Part No. - CXD3027R |
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Similar Description - CXD3027R |
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