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CXD2728Q Datasheet(PDF) 17 Page - Sony Corporation

Part # CXD2728Q
Description  Single-Chip Dolby Pro Logic Surround Decoder
Download  61 Pages
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Manufacturer  SONY [Sony Corporation]
Direct Link  http://www.sony.co.jp
Logo SONY - Sony Corporation

CXD2728Q Datasheet(HTML) 17 Page - Sony Corporation

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CXD2728Q
(3) Data Structure
The data structure is classified into three types, as shown in the table below. All data communication is done
with LSB first.
Coefficient RAM and setup register are both 16 bits
Symbol
A0 to A7
M0 to M7
D0 to D15/SQ00 to SQ15
Bit length
Remarks
8
8
16
Contents
Address section
Transfer mode section
Data section
Table 5-2. Data Structure
(3)-1. Transfer Mode Section
The transfer mode section is 8 bits and has the following functions.
Normally fixed to "0"
SU1
SU0
0
0
Field A
0
1
Field B (Not used)
1
0
Field C
1
1
Field D
VS1
VS0
0
0
Setup register
1
0
Coefficient RAM
Normally fixed to "0"
Bit
M7
M6
M5
M4
M3
M2
M1
M0
Symbol
Function
SU1
SU0
VS1
VS0
Reserve
Setup Reg.
type
Data type
Reserve
Table 5-3. Transfer Mode Section
(3)-2. Address Section
The coefficient RAM has a 256-word structure, so the address section is 8 bits. The setup register has a 4-
word structure and the field (address) is specified by the mode section, so the address section data may be
optional.
(3)-3. Data Section
The coefficient RAM and setup register both have a 16-bit structure, so 16 SCK are required.


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