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CXD2724AQ-3 Datasheet(PDF) 51 Page - Sony Corporation

Part No. CXD2724AQ-3
Description  Single-Chip Dolby Pro Logic Surround Decoder
Download  65 Pages
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Manufacturer  SONY [Sony Corporation]
Direct Link  http://www.sony.co.jp
Logo SONY - Sony Corporation

CXD2724AQ-3 Datasheet(HTML) 51 Page - Sony Corporation

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CXD2724AQ-3
27H
28H
29H
2aH
2bH
2cH
2dH
2eH
2fH
30H
31H
32H
33H
34H
35H
36H
37H
5dH
81H
82H
83H
84H
85H
86H
87H
88H
89H
8aH
8bH
8cH
8dH
8eH
8fH
90H
91H
92H
93H
d6H
d9H
dcH
ddH
Address
KLeff
KReff
KLlpi
KRlpi
a10
a11
a12
b11
b12
KLlpo
KRlpo
KLod
KRod
KSod
KLd
KRd
KCod
Kd
Ltp0
Ltp1
Ltp2
Ltp3
Ltp4
Rtp0
Rtp1
Rtp2
Rtp3
Rtp4
Stp0
Stp1
Stp2
Stp3
tp_fb
ap0_in
ap0_out
ap1_in
ap1_out
KiA
Ke
Kia
Kis
Symbol
L-ch reflected sound mix volume
R-ch reflected sound mix volume
LPF1 L-ch input volume
LPF1 R-ch input volume
LPF1 parameter
LPF1 parameter
LPF1 parameter
LPF1 parameter
LPF1 parameter
LPF1 L-ch mix volume
LPF1 R-ch mix volume
L-ch output total volume
R-ch output total volume
S-ch output total volume
L-ch
→ C-ch mix volume
R-ch
→ C-ch mix volume
C-ch output total volume
Compressor input volume (both L and R)
Delay line L-ch Tap0 read address
Delay line L-ch Tap1 read address
Delay line L-ch Tap2 read address
Delay line L-ch Tap3 read address
Delay line L-ch Tap4 read address
Delay line R-ch Tap0 read address
Delay line R-ch Tap1 read address
Delay line R-ch Tap2 read address
Delay line R-ch Tap3 read address
Delay line R-ch Tap4 read address
Delay line S-ch Tap0 read address
Delay line S-ch Tap1 read address
Delay line S-ch Tap2 read address
Delay line S-ch Tap3 read address
Delay line feedback read address
All pass filter 0 delay RAM write address
All pass filter 0 delay RAM read address
All pass filter 1 delay RAM write address
All pass filter 1 delay RAM read address
Serial audio interface input volume
De-emphasis ON/OFF
Analog input mix switch
Digital input mix switch
Function
See Table 8-5-5.
See Table 8-5-5.
See Table 8-5-5.
See Table 8-5-5.
See Table 8-5-9.
See Table 8-5-9.
See Table 8-5-9.
See Table 8-5-9.
See Table 8-5-9.
See Table 8-5-5.
See Table 8-5-5.
See Table 8-5-5.
See Table 8-5-5.
See Table 8-5-5.
See Table 8-5-5.
See Table 8-5-5.
See Table 8-5-5.
See Table 8-5-5.
See Table 8-5-12.
See Table 8-5-12.
See Table 8-5-12.
See Table 8-5-12.
See Table 8-5-12.
See Table 8-5-12.
See Table 8-5-12.
See Table 8-5-12.
See Table 8-5-12.
See Table 8-5-12.
See Table 8-5-12.
See Table 8-5-12.
See Table 8-5-12.
See Table 8-5-12.
See Table 8-5-12.
See Table 8-5-12.
See Table 8-5-12.
See Table 8-5-12.
See Table 8-5-12.
See Table 8-5-5.
0000 = OFF, ac19 = ON
See Table 8-5-4.
See Table 8-5-5.
Table 8-5-3 (2). Coefficient RAM Setting Data in SFC Mode
Setting value


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