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CXD2720Q-2 Datasheet(PDF) 18 Page - Sony Corporation

Part No. CXD2720Q-2
Description  Single-Chip Dolby Pro Logic Surround Decoder
Download  47 Pages
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Manufacturer  SONY [Sony Corporation]
Direct Link  http://www.sony.co.jp
Logo SONY - Sony Corporation

CXD2720Q-2 Datasheet(HTML) 18 Page - Sony Corporation

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CXD2720Q-2
6. Microcomputer Interface
[Relevant pins] RVDT, TRDT, SCK, XLAT, REDY
The CXD2720Q-2 performs serial audio interface format setting, volume, coefficient settings of microphone
echo delay amount and others by serial data from the microcomputer.
Further, bidirectional communication such as internal data read from the CXD2720Q-2 to the microcomputer
can be done at the rate of once in 1 LRCK.
(1) Pin Structure
The five external pins indicated in the table below are allocated for microcomputer interface.
Microcomputer interface begins operation when XLAT is received, so RVDT, TRDT, SCK and REDY are
connected in common, and by controlling (wiring) only XLAT separately, multiple CXD2720Q-2s can be used.
Pin
name
RVDT
TRDT
SCK
XLAT
REDY
I
O
I
I
O
Serial data input from microcomputer.
Serial data output to microcomputer. High impedance state unless this pin is set to internal
data read state by the microcomputer. Therefore, it is preferable to perform pull-up or pull-
down so that potential is not unstable when this pin is not active.
Shift clock for serial data. Input data from RVDT is taken according to SCK rise, and output
data from TRDT is sent out according to SCK fall.
Interprets the 8 bits of RVDT before this signal rises as transmission mode data, and the
bits before that as address data.
Transmission prohibited while at Low level. Transmission enabled at High. This pin is an
open drain, and must be pulled up externally.
I/O
Function
Table 6-1. Microcomputer Interface External Pins


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