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B32794D4225+000 Datasheet(PDF) 11 Page - EPCOS |
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B32794D4225+000 Datasheet(HTML) 11 Page - EPCOS |
11 / 19 page Pulse handling capability "dV/dt" represents the maximum permissible voltage change per unit of time for non-sinusoidal voltages, expressed in V/ µs. Note: The values of dV/dt provided below must not be exceeded in order to avoid damaging the capacitor. Lead spacing 27.5 mm 37.5 mm 52.5 mm Type B32794 B32796 B32798 VRMS (V AC) 250 300 350 400 250 300 350 400 250 300 350 400 dV/dt in V/µs 27 31 39 47 19 21 26 32 12 14 18 21 Notes: Please take all additional data not mentioned above from our Data Book 2009 Mounting guidelines 1 Soldering 1.1 Solderability of leads The solderability of terminal leads is tested to IEC 60068-2-20, test Ta, method 1. Before a solderability test is carried out, terminals are subjected to accelerated ageing (to IEC 60068-2-2, test Ba: 4 h exposure to dry heat at 155 °C). Since the ageing temperature is far higher than the upper category temperature of the capacitors, the terminal wires should be cut off from the capacitor before the ageing procedure to prevent the solderability being impaired by the products of any capacitor decomposition that might occur. Solder bath temperature 235 ±5 °C Soldering time 2.0 ±0.5 s Immersion depth 2.0 +0/ 0.5 mm from capacitor body or seating plane Evaluation criteria: Visual inspection Wetting of wire surface by new solder ≥90%, free-flowing solder 1.2 Resistance to soldering heat Resistance to soldering heat is tested to IEC 60068-2-20, test Tb, method 1A. Conditions: Series Solder bath temperature Soldering time B32794 ... B32798 MKP AC filtering Page 11 of 19 Please read Cautions and warnings and Important notes at the end of this document. |
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