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ISL8130 Datasheet(PDF) 2 Page - Intersil Corporation |
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ISL8130 Datasheet(HTML) 2 Page - Intersil Corporation |
2 / 24 page ISL8130 2 FN7954.3 October 5, 2012 Pin Configurations Ordering Information PART NUMBER (Notes 1, 2, 3) PART MARKING TEMP. RANGE (°C) PACKAGE (Pb-Free) PKG. DWG. # ISL8130IAZ 8130 IAZ -40 to +85 20 Ld QSOP M20.15 ISL8130IRZ 81 30IRZ -40 to +85 20 Ld 4x4 QFN L20.4x4 NOTES: 1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL8130 For more information on MSL please see techbrief TB363. ISL8130 (20 LD QFN) TOP VIEW ISL8130 (20 LD QSOP) TOP VIEW Pin Descriptions PIN # QFN, QSOP SYMBOL DESCRIPTION 1, 8 ISEN Input to overcurrent protection comparator. Voltage on this pin is compared with voltage on OCSET pin to detect an overcurrent condition. Connect this pin to the junction of the inductor and a current sensing resistor in a boost, sepic and flyback configuration. Connect this pin to the phase node for sensing the voltage drop across the upper MOSFET in a buck configuration. See ‘Overcurrent Protection” on Page 13 for details. 2, 9 REFIN To use REFIN as input reference, connect the desired reference voltage to the REFIN pin in the range of 0.6V to 1.25V. To use internal reference voltage, tie this pin to VCC5. Do not leave the REFIN pin floating. 3, 10 OCSET An internal current source draws 100µA through a resistor connected between the supply and this pin. Voltage at this pin is compared with voltage at the ISEN pin for detecting an overcurrent condition. 4, 11 REFOUT This pin provides buffered reference output for REFIN. Connect 2.2µF decoupling capacitor to this pin. 5, 12 NC No Connect. 6, 13 VCC5 This pin is the output of the internal 5V LDO. Connect a minimum of 4.7µF ceramic decoupling capacitor as close to the IC as possible at this pin. Refer to Table 1. 7, 14 VIN This pin powers the controller and must be decoupled to ground using a ceramic capacitor as close as possible to the VIN pin. 8, 15 SGND This pin provides the signal ground for the IC. Tie this pin to the ground plane through the lowest impedance connection. ISEN REFIN OCSET NC REFOUT 1 2 3 4 5 678 9 10 15 14 13 12 11 20 19 18 17 16 PGND CDEL PGOOD ENSS COMP 11 12 13 14 15 16 17 18 20 19 10 9 8 7 6 5 4 3 2 1 CDEL PGND LGATE PVCC PHASE UGATE ISEN BOOT REFIN OCSET PGOOD COMP FB RT ENSS SGND VIN VCC5 NC REFOUT EP |
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