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IS66WVE2M16DBLL Datasheet(PDF) 5 Page - Integrated Silicon Solution, Inc

Part # IS66WVE2M16DBLL
Description  3.0V Core Async/Page PSRAM
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Manufacturer  ISSI [Integrated Silicon Solution, Inc]
Direct Link  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS66WVE2M16DBLL Datasheet(HTML) 5 Page - Integrated Silicon Solution, Inc

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IS66WVE2M16DBLL
Rev.A | May 2012
www.issi.com - SRAM@issi.com
Functional Description
All functions for the device are listed below in Table 2.
Mode
Power
CE#
WE#
OE#
UB#/LB#
ZZ#
DQ
[15:0]4
Note
Standby
Standby
H
X
X
X
H
High-Z
2,5
Read
Active
L
H
L
L
H
Data-Out
1,4
Write
Active
L
L
X
L
H
Data-In
1,3,4
No operation
Idle
L
X
X
X
H
X
4,5
PAR
PAR
H
X
X
X
L
High-Z
6
DPD
DPD
H
X
X
X
L
High-Z
6
Load
Configuration
register
Active
L
L
X
X
L
High-Z
Table 2. Functional Descriptions
Notes
1. When UB# and LB# are in select mode (LOW), DQ0~DQ15 are affected as shown.
When only LB# is in select mode, DQ0~DQ7 are affected as shown. When only UB# is
in select mode, DQ8~DQ15 are affected as shown.
2. When the device is in standby mode, control inputs (WE#, OE#), address inputs, and data
inputs/outputs are internally isolated from any external influence.
3. When WE# is active, the OE# input is internally disabled and has no effect on the I/Os.
4. The device will consume active power in this mode whenever addresses are changed.
5. Vin=VDDQ or 0V, all device pins be static (unswitched) in order to achieve standby current.
6. DPD is enabled when configuration register bit CR[4] is “0”; otherwise, PAR is enabled.


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