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IS31FL3199 Datasheet(PDF) 6 Page - Integrated Silicon Solution, Inc |
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IS31FL3199 Datasheet(HTML) 6 Page - Integrated Silicon Solution, Inc |
6 / 16 page IS31FL3199 Integrated Silicon Solution, Inc. — www.issi.com Rev.A, 12/26/2011 6 DIGITAL INPUT SWITCHING CHARACTERISTICS (Note 3) Symbol Parameter Condition Min. Typ. Max. Unit fSCL Serial-Clock frequency 400 kHz tBUF Bus free time between a STOP and a START condition 1.3 μs tHD, STA Hold time (repeated) START condition 0.6 μs tSU, STA Repeated START condition setup time 0.6 μs tSU, STO STOP condition setup time 0.6 μs tHD, DAT Data hold time 0.9 μs tSU, DAT Data setup time 100 ns tLOW SCL clock low period 1.3 μs tHIGH SCL clock high period 0.7 μs tR Rise time of both SDA and SCL signals, receiving (Note 4) 20+0.1Cb 300 ns tF Fall time of both SDA and SCL signals, receiving (Note 4) 20+0.1Cb 300 ns Note 1: The average current of each channel is IOUT. Note 2: All LEDs are on. Note 3: Guaranteed by design. Note 4: Cb = total capacitance of one bus line in pF. ISINK ≤ 6mA. tR and tF measured between 0.3 × VCC and 0.7 × VCC. |
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