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CXD1812R Datasheet(PDF) 10 Page - Sony Corporation |
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CXD1812R Datasheet(HTML) 10 Page - Sony Corporation |
10 / 56 page – 10 – CXD1812Q/R 2-2. DRAM Interface (1) Read row col row col Tras Trp Trcd Tcas Tpc Tasc Tasr Trah Tcah Tids Tidh high XRAS XCAS MA0 to MA9 XMWR MDB0 to 7 col row col row Tras Trp Trcd Tcas Tpc Tasr Trah Tdos Tdof XRAS XCAS MA0 to MA9 XMWR MDB0 to 7 col Tasc Tcah col (2) Write Item Symbol Min. Typ. Max. Unit RAS pulse width RAS precharge width RAS – CAS delay time CAS pulse width Page mode cycle time Row address setup time (for RAS ↓) Row address hold time (for RAS ↓) Column address setup time (for CAS ↓) Column address hold time (for CAS ↓) Input data setup time (for CAS ↑) Input data hold time (for CAS ↑) Data output setup time (for CAS ↓) Data output float time (for CAS ↓) Tras Trp Trcd Tcas Tpc Tasr Trah Tasc Tcah Tids Tidh Tdos Tdof 3Tw Tw – 7 Tw Tw – 14 Tw + 2 7 0 0 Tw + 3 2Tw 2Tw Tw 2Tw ns ns ns ns ns ns ns ns ns ns ns ns ns (Tw = 1/f) |
Similar Part No. - CXD1812R |
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Similar Description - CXD1812R |
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