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CXB1549 Datasheet(PDF) 5 Page - Sony Corporation |
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CXB1549 Datasheet(HTML) 5 Page - Sony Corporation |
5 / 19 page – 5 – CXB1549Q Pad No. 22 DB 1.6 to 2.4 23 D 1.6 to 2.4 24 VCC2 3.3 25 VBB 2 26 Indicate 0.7 to 1.7 Differential PECL data inputs pins. These two inputs are internally biased by 10k Ω to VBB. Positive power supply pin for Data input circuit. Reference bias voltage. (Option) The analog voltage high impedance output pin which indicate of whether the optical power of Laser diode is operated normal or not. The power output range has following relationship. High Light Indication; Vo ≥ 1.7V Nominal Operation; Vo = 1.2V Low Light Indication; Vo ≤ 0.7V Symbol Typical voltage [V] DC AC Equivalent circuit Description 24 22 25 21 300 200 200 10k 10k 300 600 µA 23 600 µA 400 26 100k VCC VEE 14k 50 µA 35 µA 35 µA 27 Tset Selector for output duty cycle control pin. This pin controls the trailing edge of the input high pulse. Variable delay limit of that is from 0 to 0.2ns. Duty cycle is controlled by connected a resistor value between Vcc and this pin. Refer to Fig.1. VCC VEE Rset 27 2.4k 2.4k 20pF 70 µA 140 220 28 RSB 0.5 29 RS 2.5 Window comparator top/bottom threshold voltage pin for LD_ALARM. The alarm (fail) threshold assert voltage can be set by the external resistor. Default voltages are RS equal to 2.5V and RSB equal to 0.5V. 29 28 VCC VEE 100 µA 2.5k 20k 5k |
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