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NCV7425DW5R2G Datasheet(PDF) 11 Page - ON Semiconductor

Part # NCV7425DW5R2G
Description  LIN Transceiver with Voltage Regulator and Reset Pin
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

NCV7425DW5R2G Datasheet(HTML) 11 Page - ON Semiconductor

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Table 7. DC CHARACTERISTICS − 5 V VERSION
VBB = 6 V to 28 V; TJ = −40°C to +150°C; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
DC CHARACTERISTICS SUPPLY − PINS VBB AND VCC
IBB_ON
Supply current
Normal mode; LIN recessive
1.6
mA
IBB_STB
Supply current
Stand−by mode, VBB = 6 − 18 V,
TJ < 105°C
60
mA
IBB_SLP
Supply current
Sleep mode, VBB = 6 − 18V,
TJ < 105°C
20
mA
DC CHARACTERISTICS − VOLTAGE REGULATOR
VCC_OUT
Regulator output voltage
VCC load 0 − 100 mA
4.9
5
5.1
V
100 mA < VCC load < 150 mA
4.85
5
5.15
V
IOUT_LIM
Over−current limitation
150
225
300
mA
VCC_UV_THR
Under−voltage detection
threshold
4.25
4.5
4.75
V
DVCC_OUT
Line Regulation
VBB 6 − 28 V, Iout = 5 mA
TJ = 25°C
0.41
mV
Load Regulation
Iout 1 − 100 mA, VBB = 14 V,
TJ = 25°C
22
mV
Vdo
Dropout Voltage (VBB
VCC_OUT) (Note 15)
(Figure 20)
Iout = 10 mA, TJ = 25°C
22
mV
Iout = 50 mA, TJ = 25°C
108
mV
Iout = 100 mA, TJ = 25°C
216
mV
DC CHARACTERISTICS LIN TRANSMITTER
VLIN_dom_LoSup
LIN dominant output voltage
TxD = low; VBB = 7.3 V
1.2
V
VLIN_dom_HiSup
LIN dominant output voltage
TxD = low; VBB = 18 V
2.0
V
Vser_diode
LIN Voltage drop at serial diode
(Note 16)
TxD = high; ILIN = 10 mA
0.3
1
V
ILIN_lim
Short circuit current limitation
VLIN = VBB(max)
40
200
mA
Rslave
Internal pull−up resistance
20
33
47
kW
CLIN
Capacitance on pin LIN (Note 17)
25
35
pF
ILIN_off_dom
LIN output current bus in
dominant state
Driver off; VBB = 12 V
−1
mA
ILIN_off_rec
LIN output current bus in
recessive state
Driver off; VBB < 18 V,
VBB < VLIN < 18 V
1
mA
ILIN_no_GND
Communication not affected
VBB = GND = 12 V;
0 < VLIN < 18 V
−1
1
mA
ILIN_no_VBB
LIN bus remains operational
VBB = GND = 0 V;
0 < VLIN < 18 V
5
mA
DC CHARACTERISTICS LIN RECEIVER
VBUS_dom
bus voltage for dominant state
0.4
VBB
VBUS_rec
bus voltage for recessive state
0.6
VBB
Vrec_dom
Receiver threshold
LIN bus recessive → dominant
0.4
0.6
VBB
Vrec_rec
Receiver threshold
LIN bus dominant → recessive
0.4
0.6
VBB
Vrec_cnt
Receiver center voltage
(VBUS_dom + VBUS_rec) / 2
0.475
0.525
VBB
Vrec_hys
Receiver hysteresis
0.05
0.175
VBB
15.Measured at output voltage VCC_OUT = (VCC_OUT @ VBB = 6 V) − 2%.
16.The voltage drop in Normal mode between LIN and VBB pin is the sum of the diode drop and the drop at serial pull up resistor. The drop
at the switch is negligible. See Figure 2.
17.Guaranteed by design. Not tested


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