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CY8C29466-12PVXE Datasheet(PDF) 1 Page - Cypress Semiconductor |
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CY8C29466-12PVXE Datasheet(HTML) 1 Page - Cypress Semiconductor |
1 / 35 page CY8C29466, CY8C29666 Automotive – Extended Temperature PSoC® Programmable System-on-Chip Cypress Semiconductor Corporation • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document Number: 38-12026 Rev. *M Revised August 28, 2012 Features ■ AEC qualified ■ Powerful Harvard-Architecture processor ❐ M8C processor speeds up to 12 MHz ❐ Two 8 × 8 multiply, 32-bit accumulate ❐ Low power at high speed ❐ Operating voltage: 4.75 V to 5.25 V ❐ Extended temperature range: –40 °C to +125 °C ■ Advanced peripherals (PSoC ® blocks) ❐ 12 Rail-to-Rail analog PSoC blocks provide: • Up to 14-Bit analog-to-digital converters (ADCs) • Up to 9-Bit digital-to-analog converters (DACs) • Programmable gain amplifiers (PGA) • Programmable filters and comparators ❐ 16 digital PSoC blocks provide: • 8- to 32-bit timers and counters, 8- and 16-bit pulse-width modulators (PWMs) • CRC and PRS modules • Up to four full-duplex or eight half-duplex UARTs • Multiple SPI masters or slaves • Connectable to all general purpose I/O (GPIO) pins ❐ Complex peripherals by combining blocks ■ Precision, programmable clocking ❐ Internal ±4% 24 MHz oscillator ❐ High accuracy 24 MHz with optional 32.768 kHz crystal and phase locked loop (PLL) ❐ Optional external oscillator, up to 24 MHz ❐ Internal low speed, low power oscillator for Watchdog and Sleep functionality ■ Flexible on-chip memory ❐ 32K bytes flash program storage, 100 erase/write cycles ❐ 2K bytes SRAM data storage ❐ In-system serial programming (ISSP) ❐ Partial flash updates ❐ Flexible protection modes ❐ EEPROM emulation in flash ■ Programmable pin configurations ❐ 25 mA sink, 10 mA drive on all GPIOs ❐ Pull up, pull down, high Z, strong, or open drain drive modes on all GPIO ❐ Up to 12 analog inputs on GPIO [1] ❐ Four 30 mA analog outputs on GPIO ❐ Configurable interrupt on all GPIOs ■ Additional system resources ❐ I 2C™ master, slave, or multi-master operation up to 400 kHz ❐ Watchdog and sleep timers ❐ User-configurable low voltage detection (LVD) ❐ Integrated supervisory circuit ❐ On-chip precision voltage reference ■ Complete development tools ❐ Free development software (PSoC Designer™) ❐ Full featured in-circuit emulator (ICE) and programmer ❐ Full speed emulation ❐ Complex breakpoint structure ❐ 128 K bytes trace memory ❐ Complex events ❐ C Compilers, assembler, and linker Logic Block Diagram DIGITAL SYSTEM SRAM 2K Interrupt Controller Sleep and Watchdog Multiple Clock Sources (Includes IMO, ILO, PLL, and ECO) Global Digital Interconnect Global Analog Interconnect PSoC CORE CPU Core (M8C) SROM Flash 32K Digital Block Array Two Multiply Accums. Internal Voltage Ref. Digital Clocks POR and LVD System Resets Decimator SYSTEM RESOURCES ANALOG SYSTEM Analog Block Array Analog Ref. Analog Input Muxing I C 2 Port 5 Port 4 Port 3 Port 2 Port 1 Port 0 Analog Drivers SYSTEM BUS Note 1. There are eight standard analog inputs on the GPIO. The other four analog inputs connect from the GPIO directly to specific switched-capacitor block inputs. See the PSoC Technical Reference Manual for more details |
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