NB3N511DR2G datasheet(2/6 Pages) ONSEMI

Part #	NB3N511DR2G

Description	3.3V / 5.0V 14 MHz to 200 MHz PLL Clock Multiplier

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NB3N511

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Table 1. CLOCK MULTIPLIER SELECT TABLE

S1*

S0*

CLKOUT Multiplier

L

4X Input

L

M

5.333X Input

L

H

5X Input

M

L

2.5X Input

M

2X Input

M

H

3.333X Input

H

L

6X Input

H

M

3X Input

H

8X Input

*Pins S1 and S0 default to M when open

L = GND

H = VDD

M = OPEN (unconnected; will default to VDD/2)

Figure 2. NB3N511 Package Pinout,

8−Pin (150 mil) SOIC (Top View)

CLKOUT

S0

OE

X2

X1/ICLK

VDD

GND

S1

1

2

3

45

6

7

8

Table 2. PIN DESCRIPTION

Pin #

Name

I/O

Description

1

X1/ICLK

Crystal or

LVCMOS/LVTTL Input

Crystal or external reference clock input

2

VDD

Power supply

Positive supply voltage

3

GND

Power supply

0 V. Ground.

4

S1

Three level Input

Multiplier select pin − connect to VDD, GND or float

5

CLKOUT

LVCMOS/LVTTL

Output

Clock output

6

S0

Three level Input

Multiplier select pin − connect to VDD, GND or float

7

OE

LVCMOS/LVTTL Input

Output Enable. CLKOUT is high impedance when OE is low. Internal pullup

8

X2

Crystal

Crystal input – Leave open when providing an external clock reference

Table 3. COMMON OUTPUT FREQUENCY

EXAMPLES

Output Frequency

(MHz)

Input Frequency

(MHz)

S1, S0

20

10

M, M

24

12

M, M

30

10

H, M

32

16

M, M

33.33

16.66

M, M

37.5

15

M, L

40

10

L, L

48

12

L, L

50

20

M, L

60

10

H, L

64

16

L, L

Table 4. COMMON OUTPUT FREQUENCY

EXAMPLES

Output Frequency

(MHz)

Input Frequency

(MHz)

S1, S0

66.66

20

M, H

72

12

H, L

75

25

H, M

80

10

H, H

83.33

25

M, H

90

15

H, L

100

20

L, H

120

15

H, H

125

25

L, H

133.3

25

L, M

150

25

H, L

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