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CXA2056Q Datasheet(PDF) 7 Page - Sony Corporation |
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CXA2056Q Datasheet(HTML) 7 Page - Sony Corporation |
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7 / 24 page  – 7 – CXA2056Q Pin No. Symbol Pin voltage Equivalent circuit Description 24 CLPDM Clamp pulse used to clamp the dummy pixel portion of the input CCD signal. VTH = 1.5V 145 50µA 30k 30k 1.5V 24 25 26 28 PIN DIN ICONT CCD signal input. DRVOUT output waveform rise time control. When 1.5V: Maximum rise time When 3V: Minimum rise time Black level: approx. 2.1V 1.5 to 3V 145 145 200µA 50µA 23k 26 25 7k 14k 2k 2k 15µA 15µA 145 100µA 15k 45k 28 6k 6k 2.25V 29 LIN/CH Common input for the composite video signal (LIN) and high- band chroma signal (CH). Clamp potential during LIN mode: approx. 1.46V During CH mode: approx. 1.85V 145 50µA 25µA 200µA 11.5k 18.5k 1.85V CH mode 100µA LIN mode 2µA 10k 30k VRB + 50mV 29 54k Active: Low |
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