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PTB48540CAD Datasheet(PDF) 8 Page - Texas Instruments |
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PTB48540CAD Datasheet(HTML) 8 Page - Texas Instruments |
8 / 12 page Application Notes For technical support and further information visit http://power.ti.com Using the Output Inhibit Control with the PTB48540 Power-over-Ethernet Modules The PTB48540 Power-over-Ethernet (PoE) modules incorporate all the necessary interface requirements to provide 10 W of regulated DC voltage from a recognized Power-over-Ethernet source. One of the operating features of these modules allows the output voltage to be turned off, thereby placing the module in an idle state. This may be useful for applica- tions that have an alternative voltage source available, such as a wall adapter. The “Output Inihibit” control is provided by pin 13. The module functions normally with this pin open-circuit, providing a regulated output voltage whenever a valid source voltage is supplied from the Ethernet connection. When a low voltage is applied to pin 13, with respect to the “Input Ref” terminal (pin 4), the output is turned off. Even though the Ethernet source is still present. Figure 3-1 is an application schematic, which shows how the “Output Inhibit” control may be used. Either a discrete transistor (Q1), or a contact switch may be used. The “Output Inhibit” control pin has its own internal pull-up (See notes 2 & 3). Table 3-1 gives the threshold require- ments. When placed in the “Off” state, the standby current drawn from the input source is typically reduced to 1 mA 3. Table 3-1; Pin 13 Output Inhibit Control Parameters 1 Parameter Min Typ Max Enable (VIH) 4.5 V — — Disable (VIL) — — 0.8 V Vo/c [Open-Circuit] 5 V Iin [pins 13 & 4 connnected] — –1 mA — Notes: 1. The Output Inhibit control uses Input Ref (pin 4) as its 0-V reference. All voltages specified are with respect to the Input Ref pin. 2. Use an open-collector device (preferably a discrete transistor or switch) for the Output Inhibit input. A pull-up resistor is not necessary. To turn the output off, the control pin should be pulled low to less than 0.8 VDC. 3. The module’s idle current is typically less than 1 mA. This is below the minimum power signature (MPS) current, required for the PoE source to continue providing the PD with a source voltage. This will inevitably result in the removal of the module’s input source. However, the PSE will endevour to periodically re-apply input power after detecting that the PD is still a valid device. This cycle may be prevented by also modifying the module’s ‘Detect’ signature resistance so that it reflects an invalid device to the PSE. Figure 3-1 Turn-On Time: In the circuit of Figure 3-1, turning Q1 on applies a low-voltage to pin 13 and disables the module output. Correspondingly, turning Q1 off allows pin 13 to be pulled high by an internal pull-up resistor. The module produces a regulated output voltage within 60 ms. Figure 3-2 shows shows the output response of a PTB48540A (5 V) following the turn-off of Q1. The turn off of Q1 corresponds to the drop in Q1 Vgs. Although the rise-time of the output voltage is short (<5 ms), the indicated delay time will vary depending upon the input voltage and the module’s internal timing. The waveform was measured with a 48 Vdc input voltage, and a 1.4 A resistive load. Figure 3-2 Vo (2V/Div) Iin (0.2A/Div) Q1Vgs (10V/Div) HORIZ SCALE: 10ms/Div Delay Time +48 V 0 V 1 =Output Off Q 1 BSS138 +5 V 0 V Alternate On/Off Contact/Switch PTB48540A 10 Data Line B 9 Spare Line A 4 Spare Line B 8 Input Ref 7 A- Detect -B A- Class -B Output Inhibit Data Line A +V OUT Adjust –V OUT 3 2 1 5 6 12 11 13 PTB48540 Series Not Recommended for New Designs |
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