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QKL15A256TPP4(R) Datasheet(PDF) 2 Page - Freescale Semiconductor, Inc

Part # QKL15A256TPP4(R)
Description  Supports all KL14 and KL15 devices
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

QKL15A256TPP4(R) Datasheet(HTML) 2 Page - Freescale Semiconductor, Inc

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Kinetis L series MCU families combine the latest low-power innovations with precision mixed-signal capability and a broad
range of communication, connectivity, and human-machine interface peripherals. Each MCU family is supported by a
market-leading enablement bundle from Freescale and numerous ARM 3rd party ecosystem partners. The KL0x family is the
entry-point to the Kinetis L series and is compatible with the 8-bit S08PT family. The KL1x/2x/3x/4x families are compatible
with each other and their equivalent ARM Cortex-M4 Kinetis K series families - K10/20/30/40.
KL2x Family
KL1x Family
KL0x Family
KL3x Family
Family
Program
Flash
Packages
Key Features
Low power
Mixed signal
USB
Segment LCD
KL4x Family
8-32KB
32-256KB
32-256KB
64-256KB
128-256KB
16-48pin
32-80pin
32-121pin
64-121pin
64-121pin
Figure 1. Kinetis L series families of MCU portfolio
All Kinetis L series families include a powerful array of analog, communication and timing and control peripherals with the
level of feature integration increasing with flash memory size and the pin count. Features within the Kinetis L series families
include:
• Core and Architecture:
• ARM Cortex-M0+ Core delivering 1.77 CoreMark/MHz from single-cycle access memories
• Single-cycle access to I/O and critical peripherals: Up to 50 percent faster than standard I/O, improves
reaction time to external events allowing bit banging and software protocol emulation
• Two-stage pipeline: Reduced number of cycles per instruction (CPI), enabling faster branch instruction and
ISR entry
• Excellent code density vs. 8-bit and 16-bit MCUs - reduces flash size, system cost and power consumption
• Optimized access to program memory: Accesses on alternate cycles reduces power consumption
• 100 percent compatible with ARM Cortex-M0 and a subset ARM Cortex-M3/M4: Reuse existing
compilers and debug tools
• Simplified architecture: 56 instructions and 17 registers enables easy programming and efficient packaging
of 8/16/32-bit data in memory
• Linear 4 GB address space removes the need for paging/banking, reducing software complexity
• ARM third-party ecosystem support: Software and tools to help minimize development time/cost
• Micro Trace Buffer: Lightweight trace solution allows fast bug identification and correction
• BME: Bit manipulation engine reduces code size and cycles for bit oriented operations to peripheral registers
eliminating traditional methods where the core would need to perform read-modify-write instructions.
• Up to 4-channel DMA for peripheral and memory servicing with minimal CPU intervention
• Broad range of performance levels with CPU frequencies up to 48 MHz
• Ultra low-power:
• Next-generation 32-bit ARM Cortex M0+ core: 2x more CoreMark/mA than the closest 8/16-bit architecture
Kinetis L Series
KL14/KL15 Product Brief, Rev. 2, 6/2012
2
Preliminary
Freescale Semiconductor, Inc.
General Business Information


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