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TNETA1585PCM Datasheet(PDF) 9 Page - Texas Instruments

Part No. TNETA1585PCM
Description  ATM TRAFFIC MANAGEMENT SCHEDULER DEVICE WITH RECEIVE UTOPIA AND COPROCESSOR INTERFACES
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Maker  TI1 [Texas Instruments]
Homepage  http://www.ti.com
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TNETA1585PCM Datasheet(HTML) 9 Page - Texas Instruments

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TNETA1585
ATM TRAFFIC MANAGEMENT SCHEDULER DEVICE
WITH RECEIVE UTOPIA AND COPROCESSOR INTERFACES
SDNS041A – NOVEMBER 1996 – REVISED JULY 1998
9
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
(next-cell register continued)
Bits 14–4 (channel number). This field contains the channel number that the cell(s) is sent on.
Bit 3 (CLP). This field contains the cell-loss-priority indication that the SAR should insert in the outgoing cell’s
header.
Bits 2–0 (cell type). This field indicates the source of cell(s) to be sent. Several options are available for outgoing
cells, and this field, along with the CLP bit, indicates where the cell should be obtained. If the cell type is an RM
cell, then the SAR must obtain the RM-cell payload from one of the RM-cell-contents FIFOs through the slave
interface. If the cell type is data, then the SAR must obtain data from its own transmit buffers. Details are
provided in Table 2:
Table 2. Next-Cell Register Cell-Type Definition
CLP
CELL TYPE
INDICATION
CLP
BIT 2
BIT 1
BIT 0
INDICATION
0
0
0
0
In-rate VC-level RM cell from RM-cell-contents FIFO A
0
0
0
1
In-rate VC-level RM cell from RM-cell-contents FIFO B
0
0
1
0
In-rate data cell
0
0
1
1
Reserved
0
1
0
0
In-rate VP-level RM cell from RM-cell-contents FIFO A
0
1
0
1
In-rate VP-level RM cell from RM-cell-contents FIFO B
0
1
1
0
Reserved
0
1
1
1
Reserved
1
0
0
0
Out-of-rate VC-level RM cell from RM-cell-contents
FIFO C
1
0
0
1
Out-of-rate VC-level RM cell from RM-cell-contents
FIFO D
1
0
1
0
Out-of-rate data cell
1
0
1
1
Reserved
1
1
0
0
Out-of-rate VP-level RM cell from RM-cell-contents
FIFO C
1
1
0
1
Out-of-rate VP-level RM cell from RM-cell-contents
FIFO D
1
1
1
0
Reserved
1
1
1
1
Reserved
If an RM cell is sent, the TNETA1575 reads the payload portion for the cell from the appropriate FIFO, using
12 sequential accesses to the associated control-memory location.


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