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TNETA1585PCM Datasheet(PDF) 25 Page - Texas Instruments

Part No. TNETA1585PCM
Description  ATM TRAFFIC MANAGEMENT SCHEDULER DEVICE WITH RECEIVE UTOPIA AND COPROCESSOR INTERFACES
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Maker  TI1 [Texas Instruments]
Homepage  http://www.ti.com
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TNETA1585PCM Datasheet(HTML) 25 Page - Texas Instruments

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TNETA1585
ATM TRAFFIC MANAGEMENT SCHEDULER DEVICE
WITH RECEIVE UTOPIA AND COPROCESSOR INTERFACES
SDNS041A – NOVEMBER 1996 – REVISED JULY 1998
25
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
timing requirements (see Figure 8)
slave interface – read operation
NO.
MIN
MAX
UNIT
1
tsu(SCAD)
Setup time, SCAD5–SCAD0 valid before CLOCK
17
ns
2†
tsu(SCSEL)
Setup time, SCSEL low before CLOCK
13
ns
3
tsu(SCWE)
Setup time, SCWE high before CLOCK
6
ns
4†
tsu(SCOE)
Setup time, SCOE low before CLOCK
13
ns
5
th(SCAD)
Hold time, SCAD5–SCAD0 valid after CLOCK
1
ns
6‡
th(SCSEL)
Hold time, SCSEL low after CLOCK
3
ns
7
th(SCWE)
Hold time, SCWE high after CLOCK
1
ns
8‡
th(SCOE)
Hold time, SCOE low after CLOCK
2
ns
† These measurements are taken with the data enabled 4 ns before the rising edge of the clock.
‡ These measurements are taken with the data disabled at the time of the rising edge of the clock.
operating characteristics over recommended operating conditions (see Figure 8)
slave interface – read operation
NO.
PARAMETER
MIN
MAX
UNIT
9
td(SCDATA)1
Delay time, from SCAD5–SCAD0 to SCDATA31–SCDATA0 valid
5
13
ns
10
td(SCDATA)2
Delay time, from SCSEL
↓ to SCDATA31–SCDATA0 enabled
3
10
ns
11
td(SCDATA)3
Delay time, from SCOE
↓ to SCDATA31–SCDATA0 enabled
4
11
ns
12
td(SCDATA)4
Delay time, from SCSEL
↑ to SCDATA31–SCDATA0 disabled
4
9
ns
13
td(SCDATA)5
Delay time, from SCOE
↑ to SCDATA31–SCDATA0 disabled
4
9
ns
SCDATA31–
SCDATA0
(output)
SCOE
(input)
SCSEL
(input)
Valid
SCAD5–
SCAD0
(input)
11
5
Valid
9
CLOCK
(input)
1
SCWE
(input)
4
10
2
8
13
6
12
7
3
Z
Z
Figure 8. Slave Interface – Read Operation


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