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PEC02SAAN Datasheet(PDF) 1 Page - Texas Instruments |
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PEC02SAAN Datasheet(HTML) 1 Page - Texas Instruments |
1 / 13 page User 's Guide SBVU019A – October 2011 – Revised October 2011 TPS75005EVM-023 This user ’s guide describes the characteristics, operation, and use of the TPS75005EVM-023 evaluation module (EVM). The TPS75005EVM-023 is a reference design for engineering demonstration and evaluation of the TPS75005 dual low-dropout linear regulator (LDO) and triple voltage rail monitor from Texas Instruments. This user ’s guide includes setup and configuration instructions, a complete schematic diagram, bill of materials (BOM), and printed circuit board (PCB) layouts for the evaluation module. Throughout this document, the abbreviation EVM and the term evaluation module are synonymous with the TPS75005EVM-023 unless otherwise noted. Contents 1 Introduction .................................................................................................................. 2 2 Setup ......................................................................................................................... 2 3 Operation ..................................................................................................................... 4 4 Test Results ................................................................................................................. 5 5 Thermal Guidelines and Layout Recommendations ................................................................... 6 6 Board Layout ................................................................................................................ 7 7 Schematic and Bill of Materials .......................................................................................... 10 List of Figures 1 Start-Up Sequence, SEQ Set to Logic Low ............................................................................. 5 2 Shutdown Sequence, SEQ Set to Logic Low ........................................................................... 5 3 Load Step and Transient Response of LDO-1, VSET Set to Logic Low ............................................ 5 4 Load Step and Transient Response of LDO-2 .......................................................................... 5 5 Third Voltage Monitor Behavior (VDET) when EXT SVS Drops Below Regulation ................................ 6 6 Top Layer with Silk Screen ................................................................................................ 7 7 Top Layer .................................................................................................................... 8 8 Internal Layer 1 .............................................................................................................. 8 9 Internal Layer 2 .............................................................................................................. 9 10 Bottom Layer ................................................................................................................ 9 11 TPS75005EVM-023 Schematic .......................................................................................... 10 C2000 is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 1 SBVU019A – October 2011 – Revised October 2011 TPS75005EVM-023 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated |
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