The copyright and authority for the interpretation of the products are reserved by MORNSUN Specifications subject to change without notice

LH*ER2

A/0-2012

Page 3 of 6

PARALLEL LINES MEASURE

AC-DC

+Vo

-Vo

FU SE

L

N

25. 4mm

2 5.4 mm

C1

C2

12. 7mm

C o p p e r sh e et

C on n e ct

Osc illo g r a p h Pr o be

L o ad

L

N

C1: 1

μF (ceramic capacitor)

C2: 10

μF (electrolytic capacitor)

TYPICAL EFFICIENCY CURVE

Efficiency VS Output Load curve

(Vin=230Vac)

0

10

20

30

40

50

60

70

80

90

100

10 20

30 40

50 60

70 80

90

100

Total Output Current(%)

LH10-10B12ER2

LH10-10B24ER2

LH15-10B05ER2

LH15-10B12ER2

LH15-10B24ER2

LH25-10B05ER2

LH25-10B12ER2

LH25-10B24ER2

Efficiency VS Input Voltage curve

(Full Load)

50

55

60

65

70

75

80

85

90

85

120

240

264

Input Voltage(Vac)

LH10-10B12ER2

LH10-10B24ER2

LH15-10B05ER2

LH15-10B12ER2

LH15-10B24ER2

LH25-10B05ER2

LH25-10B12ER2

LH25-10B24ER2

INPUT VOLTAGE VS LOAD

TEMPERATURE VS LOAD

100

240

85

264

20

40

100

60

80

70

48

Load(%)

Input

oltage(Vac)

V

*Note: When input DC,

Vdc=1.414Vac-20.

-40

-10

55

70

100

80

60

40

20

TRIM APPLICATION & TRIM CALCULATION

Application circuit for TRIM

(Part in broken line is the interior of models)

0V

Tr im

+ Vot

0V

Trim

+ Vot

Tr im up

Tr im do wn

Formula for Trim resistor

up:

a=

Vref

Vot-Vref

R=

T

R -a

2

down:

a=

Vref

Vot-Vref

R=

T

R -a

1

Note: Value for R1, R2, R3, and Vref refer to the following table.

a: User-defined parameter, no actual meanings

Vo（V）

Resistance

5

12

24

R1(K

Ω)

3.3

3.83

8.66

R2(K

Ω)

3.3

1

1

R3(K

Ω)

1

1

1

Vref(V)

2.5

2.5

2.5

Vot(V)

Output voltage of Trim, variation

≤ ±10%

TYPICAL APPLICATIONS

LH**-10B**ER2(Single output)

L

+Vo

-Vo

L

N

N

C2

C1

TVS1 RL

NTC

FUSE

(figure 1)

LH**-10D**ER2(Isolate Twin Output)

+

-

C3 C4

-

Vo1

Vo2

N

NTC

+

L

N

L

F USE

(figure 2)