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CALVC164245IDGGREP Datasheet(PDF) 1 Page - Texas Instruments |
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CALVC164245IDGGREP Datasheet(HTML) 1 Page - Texas Instruments |
1 / 19 page www.ti.com FEATURES DGG OR DL PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 1DIR 1B1 1B2 GND 1B3 1B4 (3.3 V, 5 V) VCCB 1B5 1B6 GND 1B7 1B8 2B1 2B2 GND 2B3 2B4 (3.3 V, 5 V) VCCB 2B5 2B6 GND 2B7 2B8 2DIR 1OE 1A1 1A2 GND 1A3 1A4 VCCA (2.5 V, 3.3 V) 1A5 1A6 GND 1A7 1A8 2A1 2A2 GND 2A3 2A4 VCCA (2.5 V, 3.3 V) 2A5 2A6 GND 2A7 2A8 2OE DESCRIPTION/ORDERING INFORMATION SN74ALVC164245-EP 16-BIT 2.5-V TO 3.3-V/3.3-V TO 5-V LEVEL-SHIFTING TRANSCEIVER WITH 3-STATE OUTPUTS SCAS774A – JUNE 2004 – REVISED SEPTEMBER 2005 • Controlled Baseline – One Assembly/Test Site, One Fabrication Site • Enhanced Diminishing Manufacturing Sources (DMS) Support • Enhanced Product-Change Notification • Qualification Pedigree(1) • Member of the Texas Instruments Widebus™ Family • Max tpd of 5.8 ns at 3.3 V • ±24-mA Output Drive at 3.3 V • Control Inputs VIH/VIL Levels Are Referenced to VCCA Voltage • Latch-Up Performance Exceeds 250 mA Per JESD 17 (1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits. This 16-bit (dual-octal) noninverting bus transceiver contains two separate supply rails. B port has VCCB, which is set to operate at 3.3 V and 5 V. A port has VCCA, which is set to operate at 2.5 V and 3.3 V. This allows for translation from a 2.5-V to a 3.3-V environment, and vice versa, or from a 3.3-V to a 5-V environment, and vice versa. The SN74ALVC164245 is designed for asynchronous communication between data buses. The control circuitry (1DIR, 2DIR, 1OE, and 2OE) is powered by VCCA. To ensure the high-impedance state during power up or power down, the output-enable (OE) input should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. ORDERING INFORMATION TA PACKAGE(1) ORDERABLE PART NUMBER TOP-SIDE MARKING SSOP – DL Reel of 1000 CALVC164245IDLREP ALVC164245 TSSOP – DGG Reel of 2000 CALVC164245IDGGREP ALVC164245 –40 °C to 85°C VFBGA – GQL CALVC164245IGQLREP Reel of 1000 VC4245EP VFBGA – ZQL (Pb-free) CALVC164245IZQLREP –55 °C to 125°C TSSOP – DGG Reel of 2000 CALVC164245MDGGREP C164245MEP (1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright © 2004–2005, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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