• Multiple flexible low-power modes, including new operation clocking option which reduces dynamic power by

shutting off bus and system clocks for lowest power core processing. Peripherals with an alternate asynchronous

clock source can continue operation.

• UART, SPI, I2C, ADC, DAC, TPM, LPT and DMA support low-power mode operation without waking up the

core

• Memory:

• Scalable memory footprints from 8 KB flash / 1 KB SRAM to 128 KB flash / 16 KB SRAM

• Embedded 64 B cache memory for optimizing bus bandwidth and flash execution performance (feature not

available on KL02 family)

• Mixed-signal analog:

• Fast, high precision 16-, or 12-bit ADCs with optional differential pairs, 12-bit DACs, high speed comparators.

Powerful signal conditioning, conversion and analysis capability with reduced system cost

• Human Machine Interface (HMI):

• Optional capacitive Touch Sensing Interface with full low-power support and minimal current adder when

enabled

• Connectivity and Communications:

• All UARTs support DMA transfers, and can trigger when data on bus is detected, UART0 supports 4x to 32x

over sampling ratio. Asynchronous transmit and receive operation for operating in STOP/VLPS modes.

• Up to two SPIs

• Up to two IICs

• Full-speed USB OTG controller with on-chip transceiver

• Reliability, Safety and Security:

• Internal watchdog

• Timing and Control:

• Powerful timer modules which support general purpose, PWM, and motor control functions

• Periodic Interrupt Timer for RTOS task scheduler time base or trigger source for ADC conversion and timer

modules

• System:

• GPIO with pin interrupt functionality

• Wide operating voltage range from 1.71 V to 3.6 V with flash programmable down to 1.71 V with fully

functional flash and analog peripherals

• Ambient operating temperature ranges from -40 °C to 105 °C

2 KL24/KL25 Sub-Family Introduction

The device is highly-integrated, market leading ultra low power 32-bit microcontroller based on the enhanced Cortex-M0+

(CM0+) core platform. The family derivatives feature:

• Core platform clock up to 48 MHz, bus clock up to 24 MHz

• Memory option is up to 128 KB Flash and 16 KB RAM

• Wide operating voltage ranges from 1.71V to 3.6V with full functional Flash program/erase/read operations

• Multiple package options from 32-pin to 80-pin

• Ambient operating temperature ranges from –40 °C to 105 °C

The family acts as an ultra low power, cost effective microcontroller to provide developers an appropriate entry-level 32-bit

solution. The family is next generation MCU solution for low cost, low power, high performance devices applications. It’s

valuable for cost-sensitive, portable applications requiring long battery life-time.

3 Block Diagram

The below figure shows a superset block diagram of the device. Other devices within the family have a subset of the features.

KL24/KL25 Sub-Family Introduction

KL24/KL25 Product Brief, Rev. 2, 6/2012

Freescale Semiconductor, Inc.

Preliminary

3

General Business Information