©2001 Silicon Storage Technology, Inc.

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The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc.

MPF is a trademark of Silicon Storage Technology, Inc. Intel is a registered trademark of Intel Corporation.

These specifications are subject to change without notice.

Advance Information

FEATURES:

•

Firmware Hub for Intel 8xx Chipsets

•

2 Mbit, 3 Mbit, 4 Mbit, or 8 Mbit SuperFlash

memory array for code/data storage

– SST49LF002A: 256K x8 (2 Mbit)

– SST49LF003A: 384K x8 (3 Mbit)

– SST49LF004A: 512K x8 (4 Mbit)

– SST49LF008A: 1024K x8 (8 Mbit)

•

Flexible Erase Capability

– Uniform 4 KByte Sectors

– Uniform 16 KByte overlay blocks for

SST49LF002A

– Uniform 64 KByte overlay blocks for

SST49LF003A/004A/008A

– Top Boot Block protection

- 16 KByte for SST49LF002A

- 64 KByte for SST49LF003A/004A/008A

– Chip-Erase for PP Mode Only

•

Single 3.0-3.6V Read and Write Operations

•

Superior Reliability

– Endurance:100,000 Cycles (typical)

– Greater than 100 years Data Retention

•

Low Power Consumption

– Active Read Current: 6 mA (typical)

– Standby Current: 10 µA (typical)

•

Fast Sector-Erase/Byte-Program Operation

– Sector-Erase Time: 18 ms (typical)

– Block-Erase Time: 18 ms (typical)

– Chip-Erase Time: 70 ms (typical)

– Byte-Program Time: 14 µs (typical)

– Chip Rewrite Time:

SST49LF002A: 4 seconds (typical)

SST49LF003A: 6 seconds (typical)

SST49LF004A: 8 seconds (typical)

SST49LF008A: 15 seconds (typical)

– Single-pulse Program or Erase

– Internal timing generation

•

Two Operational Modes

– Firmware Hub Interface (FWH) Mode for

in-system operation

– Parallel Programming (PP) Mode for fast

production programming

•

Firmware Hub Hardware Interface Mode

– 5-signal communication interface supporting

byte Read and Write

– 33 MHz clock frequency operation

– WP# and TBL# pins provide hardware write

protect for entire chip and/or top Boot Block

– Block Locking Register for all blocks

– Standard SDP Command Set

– Data# Polling and Toggle Bit for End-of-Write

detection

– 5 GPI pins for system design flexibility

– 4 ID pins for multi-chip selection

•

Parallel Programming (PP) Mode

– 11-pin multiplexed address and

8-pin data I/O interface

– Supports fast In-System or PROM programming

for manufacturing

•

CMOS and PCI I/O Compatibility

•

Packages Available

– 32-lead PLCC

– 32-lead TSOP (8mm x 14mm)

PRODUCT DESCRIPTION

The SST49LF00xA flash memory devices are designed

to be read-compatible with the Intel 82802 Firmware Hub

(FWH) device for PC-BIOS application. It provides pro-

tection for the storage and update of code and data in

addition to adding system design flexibility through five

general purpose inputs. Two interface modes are sup-

ported by the SST49LF00xA: Firmware Hub (FWH)

Interface Mode for In-System programming and Parallel

Programming (PP) Mode for fast factory programming of

PC-BIOS applications.

The SST49LF00xA flash memory devices are manufac-

tured with SST’s proprietary, high performance Super-

Flash Technology. The split-gate cell design and thick

oxide tunneling injector attain better reliability and manu-

facturability compared with alternate approaches. The

SST49LF00xA devices significantly improve performance

and reliability, while lowering power consumption. The

SST49LF00xA devices write (Program or Erase) with a

single 3.0-3.6V power supply. It uses less energy during

Erase and Program than alternative flash memory tech-

nologies. The total energy consumed is a function of the

applied voltage, current and time of application. Since for

2 Mbit / 3 Mbit / 4 Mbit / 8 Mbit Firmware Hub

SST49LF002A / SST49LF003A / SST49LF004A / SST49LF008A

SST49LF002A / 003A / 004A / 008A2 Mb / 3 Mb / 4 Mb / 8 Mb Firmware Hub for Intel 8xx Chipsets