TPS68401, TPS68402

www.ti.com

SLVSA68A – MARCH 2010 – REVISED JANUARY 2011

POWER SAVE MODE

Automatic power save mode is enabled when PWRSAVE_EN bit in the CONFIG register is set to 1. In power

save mode all analog blocks are powered down with exception of charge pump protection circuits, provided

external clock source is used to run the PWM. If internal clock source has been selected, only charge pump and

LED drivers are disabled and the digital part of the LED controller remains active. In both cases charge pump

enters a special 1x mode to keep the output at battery level. During program execution the device can enter

power save if there is no PWM activity in R, G and B outputs for > 50ms. To prevent the device from entering

power-save mode for short periods of time the device does a command look-ahead. In every instruction cycle R,

G, B commands are analyzed, and if there is sufficient time left with no PWM activity, device will enter power

save mode. In power save mode program execution continues uninterruptedly. When a command that requires

PWM activity is executed, the device starts up automatically. The following table describes commands and

conditions that can activate power save mode. All channels (R, G, and B) need to meet power save condition in

order to enable power save.

POWER SAVE MODE can only be entered when no channel is in the LOAD MODE, all PWM values are zero or

channel is disabled, and C/P mode is either OFF or Automatic.

Table 4. Requirements for Power Save By Command

COMMAND

POWER SAVE REQUIREMENT

WAIT

Enter power save only if PWM is zero and wait is greater then 50 ms.

RAMP

Enter power save only if ramp ends with PWM set to zero and there is 50 ms before the next command.

TRIGGER

Enter power save only if PWM is zero while waiting for trigger.

END

Enter power save only if PWM is zero or reset bit of command is set to 1.

SET

Enter power save only if PWM is set to zero and the next command generates at least a 50-ms wait.

Other

Cannot enter power save mode

LED CONTROLLER OPERATIONAL MODES (NORMAL MODE)

In NORMAL MODE, operation of the red, green, and blue LED controller is defined independently by the

OP_MODE, and respective R/G/B_PC, R/G/B_PWM, and R/G/B_CURRENT registers. The R/G/B CURRENT

registers define the maximum output current for the respective channel. MODE control bits are synchronized to a

32-kHz clock.

In the following, PC denotes either R_PC, G_PC, or B_PC program counter. MODE denotes either R_MODE,

G_MODE, or B_MODE bits of the OP_MODE register.

DISABLED MODE

LED output current is set to 0 and PC counter is reset.

LOAD MODE

two writes are required to load a single instruction. The device supports auto-increment addressing to reduce

program load time. Register address is incremented after each 8 data bits which allows the whole program

write access to program memory is allowed only in LOAD mode and only to the channel in LOAD mode. LOAD

mode resets respective channel’s PC. Program execution on all other channels is halted and PWM value

remains static while at least one channel is in LOAD mode. Program execution continues when all channels are

out of LOAD program mode.

RUN MODE

In RUN mode the LED controller executes instructions stored in program memory. Execution is controlled by the

R, G, and B program counters (R_PC, G_PC, B_PC) and the ENABLE register. For details refer to RUN MODE

OPTIONS section. Program start position can be determined by writing to the PC registers. If program counter

runs to end (15) the next command will be executed from program location 0. If internal PWM clock source is

selected in RUN mode, the LED controller must be disabled (MODE = 00b) before disabling the chip (with

CHIP_EN bit or EN pin) to ensure that the sequence starts from the correct program counter (PC) value when

restarting the sequence. PC registers are synchronized to a 32-kHz clock.

Copyright © 2010–2011, Texas Instruments Incorporated

Submit Documentation Feedback

17

Product Folder Link(s): TPS68401 TPS68402