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SST39LF100-70-4I-WI Datasheet(PDF) 3 Page - Silicon Storage Technology, Inc

Part # SST39LF100-70-4I-WI
Description  1 Mbit (64K x16) Multi-Purpose Flash
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Manufacturer  SST [Silicon Storage Technology, Inc]
Direct Link  http://www.sst.com/
Logo SST - Silicon Storage Technology, Inc

SST39LF100-70-4I-WI Datasheet(HTML) 3 Page - Silicon Storage Technology, Inc

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Data Sheet
1 Mbit Multi-Purpose Flash
SST39LF100 / SST39VF100
3
©2001 Silicon Storage Technology, Inc.
S71129-02-000
6/01
363
Toggle Bit (DQ6)
During the internal Program or Erase operation, any con-
secutive attempts to read DQ6 will produce alternating 1s
and 0s, i.e., toggling between 1 and 0. When the internal
Program or Erase operation is completed, the DQ6 bit will
stop toggling. The device is then ready for the next opera-
tion. The Toggle Bit is valid after the rising edge of fourth
WE# (or CE#) pulse for Program operation. For Sector- or
Chip-Erase, the Toggle Bit is valid after the rising edge of
sixth WE# (or CE#) pulse. See Figure 6 for Toggle Bit tim-
ing diagram and Figure 14 for a flowchart.
Data Protection
The SST39LF/VF100 provide both hardware and software
features to protect nonvolatile data from inadvertent writes.
Hardware Data Protection
Noise/Glitch Protection: A WE# or CE# pulse of less than 5
ns will not initiate a Write cycle.
VDD Power Up/Down Detection: The Write operation is
inhibited when VDD is less than 1.5V.
Write Inhibit Mode: Forcing OE# low, CE# high, or WE#
high will inhibit the Write operation. This prevents inadvert-
ent Writes during power-up or power-down.
Software Data Protection (SDP)
The SST39LF/VF100 provide the JEDEC approved Soft-
ware Data Protection scheme for all data alteration opera-
tions, i.e., Program and Erase. Any Program operation
requires the inclusion of the three-byte sequence. The
three-byte load sequence is used to initiate the Program
operation, providing optimal protection from inadvertent
Write operations, e.g., during the system power-up or
power-down. Any Erase operation requires the inclusion of
six-byte sequence. The SST39LF/VF100 devices are
shipped with the Software Data Protection permanently
enabled. See Table 4 for the specific software command
codes. During SDP command sequence, invalid com-
mands will abort the device to Read mode within TRC. The
contents of DQ15-DQ8 are “Don’t Care” during any SDP
command sequence.
Product Identification
The Product Identification mode identifies the devices as
SST39LF100 and SST39VF100 and manufacturer as SST.
This mode may be accessed by software operations.
Users may use the Software Product Identification opera-
tion to identify the part (i.e., using the device ID) when using
multiple manufacturers in the same socket. For details, see
Table 4 for software operation, Figure 9 for the Software ID
Entry and Read timing diagram, and Figure 15 for the Soft-
ware ID Entry command sequence flowchart.
Product Identification Mode Exit/
CFI Mode Exit
In order to return to the standard Read mode, the Software
Product Identification mode must be exited. Exit is accom-
plished by issuing the Software ID Exit command
sequence, which returns the device to the Read mode.
This command may also be used to reset the device to the
Read mode after any inadvertent transient condition that
apparently causes the device to behave abnormally, e.g.,
not read correctly. Please note that the Software ID Exit/
CFI Exit command is ignored during an internal Program or
Erase operation. See Table 4 for software command
codes, Figure 10 for timing waveform and Figure 15 for a
flowchart.
TABLE
1: PRODUCT IDENTIFICATION
Address
Data
Manufacturer’s ID
0000H
00BFH
Device ID
SST39LF/VF100
0001H
2788H
T1.3 363


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