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SST28SF040A-120-4I-WH Datasheet(PDF) 11 Page - Silicon Storage Technology, Inc |
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SST28SF040A-120-4I-WH Datasheet(HTML) 11 Page - Silicon Storage Technology, Inc |
11 / 24 page Data Sheet 4 Mbit SuperFlash EEPROM SST28SF040A / SST28VF040A 11 ©2001 Silicon Storage Technology, Inc. S71077-04-000 6/01 310 TABLE 13: ERASE/PROGRAM CYCLE TIMING PARAMETERS IEEE Symbol Industry Symbol Parameter SST28SF040A SST28VF040A Units Min Max Min Max tAVA TBP Byte-Program Cycle Time 40 40 µs tWLWH TWP Write Pulse Width (WE#) 90 100 ns tAVWL TAS Address Setup Time 10 10 ns tWLAX TAH Address Hold Time 50 100 ns tELWL TCS CE# Setup Time 0 0 ns tWHEX TCH CE# Hold Time 0 0 ns tGHWL TOES OE# High Setup Time 10 20 ns tWGL TOEH OE# High Hold Time 10 20 ns tWLEH TCP Write Pulse Width (CE#) 90 100 ns tDVWH TDS Data Setup Time 50 100 ns tWHDX TDH Data Hold Time 10 20 ns tWHWL2 TSE Sector-Erase Cycle Time 4 4 ms TRST1 Reset Command Recovery Time 4 4 µs tWHWL3 TSCE Software Chip-Erase Cycle Time 20 20 ms tEHEL TCPH CE# High Pulse Width 50 50 ns tWHWL1 TWPH WE# High Pulse Width 50 50 ns TPCP1 Protect CE# or OE# Pulse Width 50 50 ns TPCH1 Protect CE# or OE# High Time 50 50 ns TPAS1 Protect Address Setup Time 40 40 ns TPAH1 Protect Address Hold Time 0 0 ns T13.6 310 1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. |
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