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SST27SF010-90 Datasheet(PDF) 6 Page - Silicon Storage Technology, Inc |
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SST27SF010-90 Datasheet(HTML) 6 Page - Silicon Storage Technology, Inc |
6 / 26 page 6 Data Sheet 256 Kbit / 512 Kbit / 1 Mbit / 2 Mbit Multi-Purpose Flash SST27SF256 / SST27SF512 / SST27SF010 / SST27SF020 ©2001 Silicon Storage Technology, Inc. S71152-02-000 5/01 502 TABLE 2: PIN DESCRIPTION Symbol Pin Name Functions AMS1-A0 Address Inputs To provide memory addresses DQ7-DQ0 Data Input/output To output data during Read cycles and receive input data during Program cycles The outputs are in tri-state when OE# or CE# is high. CE# Chip Enable To activate the device when CE# is low OE# Output Enable For SST27SF256/010/020, to gate the data output buffers during Read operation OE#/VPP Output Enable/VPP For SST27SF512, to gate the data output buffers during Read operation and high voltage pin during Chip-Erase and programming operation VPP Power Supply for Program or Erase For SST27SF256/010/020, high voltage pin during Chip-Erase and programming opera- tion 12V (±5%) VDD Power Supply To provide 5.0V supply (±10%) VSS Ground NC No Connection Unconnected pins. T2.3 502 1. AMS = Most significant address AMS = A14 for SST27SF256, A15 for SST27SF512, A16 for SST27SF010, and A17 for SST27SF020 |
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